//******************************************************************************************
//   Project      :  LPC810M021FN08 Sample Program
//   Program Name :
//   Programer    :
//   Create date  :  Version 1.0    H25.12.01
//   History      :
//   Laungage     :
//******************************************************************************************
//  (1)Description
//
//******************************************************************************************

#include "LPC8xx.h"

#define PI_LOOP_N 500000
void Init_IOCON(void);

int main(void) {
    unsigned int lp;

// ********************
//  1.Initialized
// ********************
//  (1)Define I/O PORT (Configuration)
    Init_IOCON();

//  (2)Define I/O PORT (Direction)
    LPC_GPIO_PORT->DIR0 = 0x00000002;

// ********************
//  2.Main
// ********************
    while(1){
        LPC_GPIO_PORT->CLR0 = 0x00000002;
        for(lp=0;lp<PI_LOOP_N;lp++)asm("nop");
        LPC_GPIO_PORT->SET0 = 0x00000002;
        for(lp=0;lp<PI_LOOP_N;lp++)asm("nop");
    }
}


//******************************************************************************************
//   Function Name : Init_IOCON
//   Title         : This function sets the attributes of the port .
//   Input         :
//   Output        :
//   Description   : This function may be a default value is usually .
//******************************************************************************************
void Init_IOCON(void)
{
// ****************************
// 1.Define IOCON ( PIO0_0 ) register
// ****************************
//    IOCON(PIO0_0)[2:0] - Reserved.  Reset value:0
//    IOCON(PIO0_0)[4:3] MODE Selects function mode (on-chip pull-up/pull-down resistor	control). Reset value:0b10
//        0x0 Inactive (no pull-down/pull-up resistor enabled).
//        0x1 Pull-down resistor enabled.
//        0x2 Pull-up resistor enabled.
//        0x3 Repeater mode.
//    IOCON(PIO0_0)[5] HYS Hysteresis. Reset value:0
//        0 Disable.
//        1 Enable.
//    IOCON(PIO0_0)[6] INV Invert input   Reset value:0
//        0 Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0).
//        1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1).
//    IOCON(PIO0_0)[9:7] - Reserved. Reset value:0b001
//    IOCON(PIO0_0)[10] OD Open-drain mode. Reset value:0
//        0 Disable.
//        1 Open-drain mode enabled.  Remark: This is not a true open-drain mode.
//    IOCON(PIO0_0)[12:11] S_MODE Digital filter sample mode. Reset value:0
//        0x0 Bypass input filter.
//        0x1 1 clock cycle. Input pulses shorter than one filter clock are rejected.
//        0x2 2 clock cycles. Input pulses shorter than two filter clocks are rejected.
//        0x3 3 clock cycles. Input pulses shorter than three filter clocks are rejected.
//    IOCON(PIO0_0)[15:13] CLK_DIV Select peripheral clock divider for input filter sampling clock.  Reset value:0
//        Value 0x7 is reserved.	0
//          0x0 IOCONCLKDIV0.
//          0x1 IOCONCLKDIV1.
//          0x2 IOCONCLKDIV2.
//          0x3 IOCONCLKDIV3.
//          0x4 IOCONCLKDIV4.
//          0x5 IOCONCLKDIV5.
//          0x6 IOCONCLKDIV6.
//    IOCON(PIO0_0)[31:16] - Reserved.   Reset value:0

//  LPC_IOCON->PIO0_0 &= ~0x00000000;

// ****************************
// 2.Define IOCON ( PIO0_1 ) register
// ****************************
//    IOCON(PIO0_1)[2:0] - Reserved.  Reset value:0
//    IOCON(PIO0_1)[4:3] MODE Selects function mode (on-chip pull-up/pull-down resistor control). Reset value:0b10
//         0x0 Inactive (no pull-down/pull-up resistor enabled).
//         0x1 Pull-down resistor enabled.
//         0x2 Pull-up resistor enabled.
//         0x3 Repeater mode.
//    IOCON(PIO0_1)[5] HYS Hysteresis. Reset value:0
//         0 Disable.
//         1 Enable.
//    IOCON(PIO0_1)[6] INV Invert input   Reset value:0
//         0 Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0).
//         1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1).
//    IOCON(PIO0_1)[9:7] - Reserved.   Reset value:0b001
//    IOCON(PIO0_1)[10] OD Open-drain mode.    Reset value:0
//         0 Disable.
//         1 Open-drain mode enabled.  Remark: This is not a true open-drain mode.
//    IOCON(PIO0_1)[12:11] S_MODE Digital filter sample mode. Reset value:0
//         0x0 Bypass input filter.
//         0x1 1 clock cycle. Input pulses shorter than one filter clock are rejected.
//         0x2 2 clock cycles. Input pulses shorter than two filter clocks are rejected.
//         0x3 3 clock cycles. Input pulses shorter than three filter clocks are rejected.
//    IOCON(PIO0_1)[15:13] CLK_DIV Select peripheral clock divider for input filter sampling clock.  Reset value:0
//        Value 0x7 is reserved. 0
//         0x0 IOCONCLKDIV0.
//         0x1 IOCONCLKDIV1.
//         0x2 IOCONCLKDIV2.
//         0x3 IOCONCLKDIV3.
//         0x4 IOCONCLKDIV4.
//         0x5 IOCONCLKDIV5.
//         0x6 IOCONCLKDIV6.
//    IOCON(PIO0_1)[31:16] - Reserved.   Reset value:0

    LPC_IOCON->PIO0_1 &= ~0x00000018;
    LPC_IOCON->PIO0_1 |= (0x01<<5);

// ****************************
// 3.Define IOCON ( PIO0_2 ) register
// ****************************
//    IOCON(PIO0_2)[2:0] - Reserved. 0
//    IOCON(PIO0_2)[4:3] MODE Selects function mode (on-chip pull-up/pull-down resistor control).  Reset value:0b10
//         0x0 Inactive (no pull-down/pull-up resistor enabled).
//         0x1 Pull-down resistor enabled.
//         0x2 Pull-up resistor enabled.
//         0x3 Repeater mode.
//    IOCON(PIO0_2)[5] HYS Hysteresis.    Reset value:0
//         0 Disable.
//         1 Enable.
//    IOCON(PIO0_2)[6] INV Invert input.  Reset value:0
//         0 Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0).
//         1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1).
//    IOCON(PIO0_2)[9:7] - Reserved.      Reset value:0b001
//    IOCON(PIO0_2)[10] OD Open-drain mode. Reset value:0
//         0 Disable.
//         1 Open-drain mode enabled.   Remark: This is not a true open-drain mode.
//    IOCON(PIO0_2)[12:11] S_MODE Digital filter sample mode.   Reset value:0
//         0x0 Bypass input filter.
//         0x1 1 clock cycle. Input pulses shorter than one filter clock are rejected.
//         0x2 2 clock cycles. Input pulses shorter than two filter clocks are rejected.
//         0x3 3 clock cycles. Input pulses shorter than three filter clocks are rejected.
//    IOCON(PIO0_2)[15:13] CLK_DIV Select peripheral clock divider for input filter sampling clock.  Reset value:0
//        Value 0x7 is reserved.
//           0x0 IOCONCLKDIV0.
//           0x1 IOCONCLKDIV1.
//           0x2 IOCONCLKDIV2.
//           0x3 IOCONCLKDIV3.
//           0x4 IOCONCLKDIV4.
//           0x5 IOCONCLKDIV5.
//           0x6 IOCONCLKDIV6.
//    IOCON(PIO0_2)[31:16] - Reserved.  Reset value:0

    LPC_IOCON->PIO0_2 &= ~0x00000018;

// ****************************
// 4.Define IOCON ( PIO0_3 ) register
// ****************************
//    IOCON(PIO0_3)[2:0] - Reserved.    Reset value:0
//    IOCON(PIO0_3)[4:3] MODE Selects function mode (on-chip pull-up/pull-down resistor control). Reset value:0b10
//         0x0 Inactive (no pull-down/pull-up resistor enabled).
//         0x1 Pull-down resistor enabled.
//         0x2 Pull-up resistor enabled.
//         0x3 Repeater mode.
//    IOCON(PIO0_3)[5] HYS Hysteresis. Reset value:0
//         0 Disable.
//         1 Enable.
//    IOCON(PIO0_3)[6] INV Invert input. Reset value:0
//         0 Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0).
//         1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1).
//    IOCON(PIO0_3)[9:7] - Reserved. Reset value:0b001
//    IOCON(PIO0_3)[10] OD Open-drain mode. Reset value:0
//         0 Disable.
//         1 Open-drain mode enabled.  Remark: This is not a true open-drain mode.
//    IOCON(PIO0_3)[12:11] S_MODE Digital filter sample mode. Reset value:0
//         0x0 Bypass input filter.
//         0x1 1 clock cycle. Input pulses shorter than one filter clock are rejected.
//         0x2 2 clock cycles. Input pulses shorter than two filter clocks are rejected.
//         0x3 3 clock cycles. Input pulses shorter than three filter clocks are rejected.
//    IOCON(PIO0_3)[15:13] CLK_DIV Select peripheral clock divider for input filter sampling clock.   Reset value:0
//  Value 0x7 is reserved.
//        0x0 IOCONCLKDIV0.
//        0x1 IOCONCLKDIV1.
//        0x2 IOCONCLKDIV2.
//        0x3 IOCONCLKDIV3.
//        0x4 IOCONCLKDIV4.
//        0x5 IOCONCLKDIV5.
//        0x6 IOCONCLKDIV6.
//    IOCON(PIO0_3)[31:16] - Reserved.  Reset value:0

    LPC_IOCON->PIO0_3 &= ~0x00000018;


// ****************************
// 5.Define IOCON ( PIO0_4 ) register
// ****************************
//    IOCON(PIO0_4)[2:0] - Reserved. Reset value:0
//    IOCON(PIO0_4)[4:3] MODE Selects function mode (on-chip pull-up/pull-down resistor control). Reset value:0b10
//        0x0 Inactive (no pull-down/pull-up resistor enabled).
//        0x1 Pull-down resistor enabled.
//        0x2 Pull-up resistor enabled.
//        0x3 Repeater mode.
//    IOCON(PIO0_4)[5] HYS Hysteresis. Reset value:0
//        0 Disable.
//        1 Enable.
//    IOCON(PIO0_4)[6] INV Invert input Reset value:0
//        0 Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0).
//        1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1).
//    IOCON(PIO0_4)[9:7] - Reserved. Reset value:0b001
//    IOCON(PIO0_4)[10] OD Open-drain mode. Reset value:0
//        0 Disable.
//        1 Open-drain mode enabled.  Remark: This is not a true open-drain mode.
//    IOCON(PIO0_4)[12:11] S_MODE Digital filter sample mode. Reset value:0
//        0x0 Bypass input filter.
//        0x1 1 clock cycle. Input pulses shorter than one filter clock are rejected.
//        0x2 2 clock cycles. Input pulses shorter than two filter clocks are rejected.
//        0x3 3 clock cycles. Input pulses shorter than three filter clocks are rejected.
//    IOCON(PIO0_4)[15:13] CLK_DIV Select peripheral clock divider for input filter sampling clock.Reset value:0
//        Value 0x7 is reserved.
//        0x0 IOCONCLKDIV0.
//        0x1 IOCONCLKDIV1.
//        0x2 IOCONCLKDIV2.
//        0x3 IOCONCLKDIV3.
//        0x4 IOCONCLKDIV4.
//        0x5 IOCONCLKDIV5.
//        0x6 IOCONCLKDIV6.
//    IOCON(PIO0_4)[31:16] - Reserved.  Reset value:0

//  LPC_IOCON->PIO0_4 = 0x00000000;

// ****************************
// 6.Define IOCON ( PIO0_5 ) register
// ****************************
//    IOCON(PIO0_5)[2:0] - Reserved.  Reset value:0
//    IOCON(PIO0_5)[4:3] MODE Selects function mode (on-chip pull-up/pull-down resistor control). Reset value:0b10
//       0x0 Inactive (no pull-down/pull-up resistor enabled).
//       0x1 Pull-down resistor enabled.
//       0x2 Pull-up resistor enabled.
//       0x3 Repeater mode.
//    IOCON(PIO0_5)[5] HYS Hysteresis. Reset value:0
//       0 Disable.
//       1 Enable.
//    IOCON(PIO0_5)[6] INV Invert input    Reset value:0
//       0 Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0).
//       1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1).
//    IOCON(PIO0_5)[9:7] - Reserved. Reset value:0b001
//    IOCON(PIO0_5)[10] OD Open-drain mode.   Reset value:0
//       0 Disable.
//       1 Open-drain mode enabled.  Remark: This is not a true open-drain mode.
//    IOCON(PIO0_5)[12:11] S_MODE Digital filter sample mode. Reset value:0
//       0x0 Bypass input filter.
//       0x1 1 clock cycle. Input pulses shorter than one filter clock are rejected.
//       0x2 2 clock cycles. Input pulses shorter than two filter clocks are rejected.
//       0x3 3 clock cycles. Input pulses shorter than three filter clocks are rejected.
//    IOCON(PIO0_5)[15:13] CLK_DIV Select peripheral clock divider for input filter sampling clock.  Reset value:0
//       Value 0x7 is reserved.
//       0x0 IOCONCLKDIV0.
//       0x1 IOCONCLKDIV1.
//       0x2 IOCONCLKDIV2.
//       0x3 IOCONCLKDIV3.
//       0x4 IOCONCLKDIV4.
//       0x5 IOCONCLKDIV5.
//       0x6 IOCONCLKDIV6.
//    IOCON(PIO0_5)[31:16] - Reserved.  Reset value:0

//  LPC_IOCON->PIO0_5 = 0x00000000;      //PIO0_5/RESET (R)

}