;******************************************************************************************
;  ＡＶＲサンプル
;   Project      :
;   Program Name : 
;   Programer    :
;   Create date  :  Version 1.0    H23.09.20
;   History      :
;******************************************************************************************
;   Description 
;  
;******************************************************************************************
.include "tn13adef.inc"
.cseg
    LDI   R16,RAMEND
    OUT   SPL,R16

; ********************
; 1.初期化
; ********************
; (1)ポートの初期化
    LDI   R16,0b00000000
    OUT   PORTB,R16 

; (2)ＰＷＭポートを出力に設定
    LDI   R16,(1<<DDB1)|(1<<DDB0)
    OUT   DDRB,R16 

; (3)PWMの初期化
    RCALL Int_PWM

; ********************
; 2.メイン
; ********************
; (1)デューティーサイクルを設定
    LDI   R16,0x3f     ; OC0Aにデューティーサイクル25%を出力(25%:0xff*0d25/0d100)
    OUT   OCR0A,R16 

    LDI   R16,0xBD     ; OC0Bにデューティーサイクル75%を出力(75%:0xff*0d75/0d100)
    OUT   OCR0B,R16

MAIN:
    RJMP  MAIN

;******************************************************************************************
;   Function Name : Int_PWM 
;   Title         : タイマーの８ビットＰＷＭ初期化
;   Input         :
;   Output        :
;   Description   : ８ビット高速ＰＷＭモードを使用
;******************************************************************************************
Int_PWM:
    PUSH    R16

; *********************************************************
; 1.TCCR0A(Timer/Counter0 Control Register A)
;     TCCR0A[7] COM0A1: Compare Match Output A Mode
;     TCCR0A[6] COM0A0: Compare Match Output A Mode
;         Compare Output Mode, Fast PWM Mode
;           COM0A1  COM0A0
;             0       0      Normal port operation, OC0A disconnected.
;             0       1      WGM02 = 0: Normal Port Operation, OC0A Disconnected.
;                            WGM02 = 1: Toggle OC0A on Compare Match.
;             1       0      Clear OC0A on Compare Match, set OC0A at TOP   (*)
;             1       1      Set OC0A on Compare Match, clear OC0A at TOP   (*)
;     TCCR0A[5] COM0B1: Compare Match Output B Mode
;     TCCR0A[4] COM0B0: Compare Match Output B Mode
;         Compare Output Mode, Fast PWM Mode
;           COM0B1  COM0B0
;             0       0      Normal port operation, OC0B disconnected.
;             0       1      Reserved
;             1       0      Clear OC0B on Compare Match, set OC0B at TOP   (*)
;             1       1      Set OC0B on Compare Match, clear OC0B at TOP   (*)
;     TCCR0A[3] Reserved Bits (These bits are reserved bits in the ATtiny13A and will always read as zero)
;     TCCR0A[2] Reserved Bits (These bits are reserved bits in the ATtiny13A and will always read as zero)
;     TCCR0A[1] WGM01: Waveform Generation Mode
;     TCCR0A[0] WGM00: Waveform Generation Mode
;          Mode WGM02 WGM01 WGM00 Timer/Counter Mode of Operation 
;            0    0     0     0     Normal 0xFF Immediate MAX
;            1    0     0     1     PWM(Phase Correct)
;            2    0     1     0     CTC 
;            3    0     1     1     Fast PWM   (*)  See. Manual P.73
;            4    1     0     0     Reserved
;            5    1     0     1     PWM (Phase Correct)
;            6    1     1     0     Reserved
;            7    1     1     1     Fast PWM   (*)  See. Manual P.73
; *********************************************************
    LDI   R16,(1<<COM0A1)|(0<<COM0A0)|(1<<COM0B1)|(0<<COM0B0)|(1<<WGM01)|(1<<WGM00)
    OUT   TCCR0A,R16

; *********************************************************
; 2.TCCR0B(Timer/Counter0 Control Register B) 
;      TCCR0B[7] FOC0A : Force Output Compare A 
;                          The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
;      TCCR0B[6] FOC0B : Force Output Compare A 
;                          The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
;      TCCR0B[5] Reserved Bits (These bits are reserved bits in the ATtiny13A and will always read as zero.)
;      TCCR0B[4] Reserved Bits (These bits are reserved bits in the ATtiny13A and will always read as zero.)
;      TCCR0B[3] WGM02 : Waveform Generation Mode (See. TCCR0A)
;      TCCR0B[2] CS02  : Clock Select
;      TCCR0B[1] CS01  : Clock Select
;      TCCR0B[0] CS00  : Clock Select
;           The three Clock Select bits select the clock source to be used by the Timer/Counter.
;               CS02 CS01 CS00 Description
;                 0    0    0   No clock source (Timer/Counter stopped)
;                 0    0    1   clkI/O/(No prescaling)
;                 0    1    0   clkI/O/8 (From prescaler)
;                 0    1    1   clkI/O/64 (From prescaler)
;                 1    0    0   clkI/O/256 (From prescaler)
;                 1    0    1   clkI/O/1024 (From prescaler)
;                 1    1    0   External clock source on T0 pin. Clock on falling edge.
;                 1    1    1   External clock source on T0 pin. Clock on rising edge.
;               Examples 1. OSC:9.6MHz
;                  001: 9.6MHz(OSC)/0xFF/1    ==> 37.6KHz
;                  101: 9.6MHz(OSC)/0xFF/1024 ==> 36.8Hz
;               Examples 2. OSC:1.2MHz
;                  001: 1.2MHz(OSC)/0xFF/1    ==>  4.71KHz
;                  101: 1.2MHz(OSC)/0xFF/1024 ==>  4.60Hz 
; *********************************************************
    LDI   R16,(0<<FOC0A)|(0<<FOC0B)|(0<<WGM02)|(0<<CS02)|(0<<CS01)|(1<<CS00)
    OUT   TCCR0B,R16

; *********************************************************
; 3.TCNT0(Timer/Counter0)    * No operation
; *********************************************************
;   TCNT0

; *********************************************************
; 4.OCR0A(Timer/Counter0 Output Compare A Register)  
;       Default duty OCR0A (8 bits)
; *********************************************************
    LDI   R16,0x7f
    OUT   OCR0A,R16

; *********************************************************
; 5.OCR0B(Timer/Counter0 Output Compare B Register) 
;       Default duty OCR0A (8 bits)
; *********************************************************
    LDI   R16,0x7f
    OUT   OCR0B,R16

; *********************************************************
; 6.TIMSK0(Timer/Counter Interrupt Mask Register)   * No operation
;      OCIE0B  : Timer/Counter Output Compare Match B Interrupt Enable
;      OCIE0A  : Timer/Counter Output Compare Match A Interrupt Enable
;      TOIE0   : Timer/Counter Overflow Interrupt Enable
; *********************************************************
;   TIMSK0

; *********************************************************
;  7.TIFR0(Timer/Counter Interrupt Flag Register)   * No operation 
;     OCF0B     :Timer/Conter, Output Compare B Match Flag
;     OCF0A     :Timer/Conter, Output Compare A Match Flag
;     TOV0      :Timer/Counter Overflow Flag
; *********************************************************
;   TIFR0 
                                        
    POP    R16
    RET