//****************************************************************************************** // PIC12F1822 Sample Program // Project : // Program Name : // Programer : // Create date : Version 1.0 H25.10.27 // Replace date : // History : // Laungage : HI_TECH PICC C Laungage Version 9.83 //****************************************************************************************** // Description // OSC : Internal OSC 32MHz // Assign I/O pins // Ra2[O] : Audio output // Ra3[I] : MIC input // Ra4[O] : MIC clock // Ra5[O] : MIC R/L select //****************************************************************************************** #include __CONFIG( FOSC_INTOSC & WDTE_OFF & PWRTE_OFF & MCLRE_OFF & CP_OFF & CPD_OFF & BOREN_OFF & CLKOUTEN_OFF & IESO_OFF & FCMEN_OFF ); //__CONFIG( FOSC_INTOSC & WDTE_OFF & PWRTE_OFF & MCLRE_OFF & CP_OFF & CPD_OFF // & BOREN_OFF & CLKOUTEN_ON & IESO_OFF & FCMEN_OFF ); __CONFIG( WRT_OFF & PLLEN_ON & STVREN_OFF & BORV_HI & LVP_OFF ) ; //__CONFIG( WRT_OFF & PLLEN_OFF & STVREN_OFF & BORV_HI & LVP_OFF ) ; #define PI_NORMAL 0 #define PI_FAILER 1 void Init_RCM(void); int main(void) { // ******************************** // 1.Initialized // ******************************** // (1)Define OSC (Internal OSC 32MHz) // OSCCON = 0b01111010; //Internal OSC 16MHz OSCCON = 0b11110000; //Internal OSC 32MHz // (2)Define ANSELA (All Degital Port) ANSELA = 0x00; // (3)Define I/O PORT PORTA = 0x00; TRISA = 0b11011011; // (4)Initialized REFERENCE CLOCK MODULE Init_RCM(); // ******************************** // 2.Program main // ******************************** // (1)Select MIC PORTA = 0b00100000; // (2)Main loop while(1){ if((PORTA & 0b00001000)!=0) PORTA |= 0b00000100; else PORTA &= 0b11111011; } } //******************************************************************************************* // Function Name : Init_RCM@@@ // Function : Initialized REFERENCE CLOCK MODULE // Input : // Output : // Description : //******************************************************************************************* void Init_RCM(void) { // ****************************************** // 1.Define CLKRCON: REFERENCE CLOCK CONTROL REGISTER // CLKRCON[7] CLKREN: Reference Clock Module Enable bit // 1 = Reference clock module is enabled // 0 = Reference clock module is disabled // CLKRCON[6] CLKROE: Reference Clock Output Enable bit // 1 = Reference clock output is enabled on CLKR pin // 0 = Reference clock output disabled on CLKR pin // CLKRCON[5] CLKRSLR: Reference Clock Slew Rate Control limiting enable bit // 1 = Slew rate limiting is enabled // 0 = Slew rate limiting is disabled // CLKRCON[4-3] CLKRDC<1:0>: Reference Clock Duty Cycle bits // 11 = Clock outputs duty cycle of 75% // 10 = Clock outputs duty cycle of 50% // 01 = Clock outputs duty cycle of 25% // 00 = Clock outputs duty cycle of 0% // CLKRCON[2-0] CLKRDIV<2:0> Reference Clock Divider bits // 111 = Base clock value divided by 128 // 110 = Base clock value divided by 64 // 101 = Base clock value divided by 32 // 100 = Base clock value divided by 16 // 011 = Base clock value divided by 8 // 010 = Base clock value divided by 4 // 001 = Base clock value divided by 2 // In this mode, the 25% and 75% duty cycle accuracy will be dependent on the source clock duty cycle. // 000 = Base clock value // In this mode, the duty cycle will always be equal to the source clock duty cycle, unless a duty cycle of 0% is selected. // ****************************************** // CLKRCON = 0b11010011; //FOSC:16MHz ==> CLKOUT:2MHz CLKRCON = 0b11010100; //FOSC:32MHz ==> CLKOUT:2MHz }