;****************************************************************************************** ; PIC12F1822 Sample Program ; Project : ; Program Name : ; Programer : ; Create date : Version 1.0 H25.11.02 ; History : ; Laungage : MPLAB MPASM ;****************************************************************************************** ; Description ; OSC : Internal OSC 32MHz ; Assign I/O pins ; Ra0[I] : Input triangular wave ; Ra1[I] : Input audio source ; Ra2[O] : Digital audio output ; Ra3[I] : Check the upper limit of the triangular wave ; Ra4[O] : Do the adjustment of the triangular wave ;****************************************************************************************** LIST P=PIC12F1822,ST=OFF,R=DEC INCLUDE "P12F1822.inc" __CONFIG _CONFIG1 , _FOSC_INTOSC & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF ; __CONFIG _CONFIG2 , _WRT_OFF & _PLLEN_OFF & _STVREN_OFF & _BORV_HI & _LVP_OFF __CONFIG _CONFIG2 , _WRT_OFF & _PLLEN_ON & _STVREN_OFF & _BORV_HI & _LVP_OFF ; ; Define GENERAL PURPOSE RAM AREA (80 bytes maximum) ; TMP_G EQU 20H ; ; Define Common RAM AREA (16 bytes) ; TMP_C EQU 70H ; ; Define Macro ; SELBANK MACRO #BANK_NO MOVLW #BANK_NO MOVWF BSR ENDM ; ; Define Parameter ; TRA_HIG EQU 3 TRA_OUT EQU 4 ORG 0h GOTO START ORG 4h GOTO START START ; ***************************** ; 1.Initialize ; ***************************** ; (1)Define OSC SELBANK 1 ; SET BANK1 ; MOVLW B'01111010' ; Internal OSC 16MHz MOVLW B'11110000' ; Internal OSC 32MHz MOVWF OSCCON ; (2)Define ANSELA Register SELBANK 3 ; SET BANK3 CLRF ANSELA ; All degital port ; (3)Define I/O port SELBANK 1 ; SET BANK1 MOVLW B'11101011' MOVWF TRISA SELBANK 0 ; SET BANK0 CLRF PORTA ; (4)Initialized comparator module CALL INITCMP SELBANK 0 ; SET BANK0 ; ***************************** ; 2.Program main ; ***************************** BSF PORTA,TRA_OUT MAIN BTFSS PORTA,TRA_HIG GOTO MAIN ; BCF PORTA,TRA_OUT BSF PORTA,TRA_OUT GOTO MAIN ; ;****************************************************************************************** ; Function Name : INITCMP ; Title : Initialized comparator module ; Input : ; Output : ; Description : C1VP:C1IN+ / C1VN:C1IN0- ;****************************************************************************************** INITCMP ; ******************************************************* ; 1.Analog Channel Select ; ******************************************************* SELBANK 3 MOVLW B'00000011' ; Select Analog PIN ANS(0) and ANS(1) MOVWF ANSELA ; ******************************************************* ; 2.CM1CON0: COMPARATOR 1 CONTROL REGISTER 0 ; CM1CON0[7] CxON: Comparator Enable bit ; 1 = Comparator is enabled and consumes no active power ; 0 = Comparator is disabled ; CM1CON0[6] CxOUT: Comparator Output bit ; If CxPOL = 1 (inverted polarity): ; 1 = CxVP < CxVN ; 0 = CxVP > CxVN ; If CxPOL = 0 (non-inverted polarity): ; 1 = CxVP > CxVN ; 0 = CxVP < CxVN ; CM1CON0[5] CxOE: Comparator Output Enable bit ; 1 = CxOUT is present on the CxOUT pin. Requires that the associated TRIS bit be cleared to actually ; drive the pin. Not affected by CxON. ; 0 = CxOUT is internal only ; CM1CON0[4] CxPOL: Comparator Output Polarity Select bit ; 1 = Comparator output is inverted ; 0 = Comparator output is not inverted ; CM1CON0[3] Unimplemented: Read as e0f ; CM1CON0[2] CxSP: Comparator Speed/Power Select bit ; 1 = Comparator operates in normal power, higher speed mode ; 0 = Comparator operates in low-power, low-speed mode ; CM1CON0[1] CxHYS: Comparator Hysteresis Enable bit ; 1 = Comparator hysteresis enabled ; 0 = Comparator hysteresis disabled ; CM1CON0[0] CxSYNC: Comparator Output Synchronous Mode bit ; 1 = Comparator output to Timer1 and I/O pin is synchronous to changes on Timer1 clock source. ; Output updated on the falling edge of Timer1 clock source. ; 0 = Comparator output to Timer1 and I/O pin is asynchronous. ; ******************************************************* SELBANK 2 MOVLW B'10110100' MOVWF CM1CON0 ; ******************************************************* ; 3.CM1CON1: COMPARATOR CX CONTROL REGISTER 1 ; CM1CON1[7] CxINTP: Comparator Interrupt on Positive Going Edge Enable bits ; 1 = The CxIF interrupt flag will be set upon a positive going edge of the CxOUT bit ; 0 = No interrupt flag will be set on a positive going edge of the CxOUT bit ; CM1CON1[6] CxINTN: Comparator Interrupt on Negative Going Edge Enable bits ; 1 = The CxIF interrupt flag will be set upon a negative going edge of the CxOUT bit ; 0 = No interrupt flag will be set on a negative going edge of the CxOUT bit ; CM1CON1[5-4] CxPCH<1:0>: Comparator Positive Input Channel Select bits ; 00 = CxVP connects to CxIN+ pin ; 01 = CxVP connects to DAC Voltage Reference ; 10 = CxVP connects to FVR Voltage Reference ; CM1CON1[3-2] Unimplemented: Read as e0f ; CM1CON1[1-0] CxNCH<1:0>: Comparator Negative Input Channel Select bits ; PIC12F/LF1822: ; 0 = C1VN connects to C1IN0- pin ; 1 = C1VN connects to C1IN1- pin ; ******************************************************* SELBANK 2 MOVLW B'00000000' ; FVR / C1IN0- MOVWF CM1CON1 ; ******************************************************* ; 4.CMOUT: COMPARATOR OUTPUT REGISTER ; CMOUT[7-2] Unimplemented: Read as e0f ; CMOUT[1] MC2OUT: Mirror Copy of C2OUT bit(1) ; CMOUT[0] MC1OUT: Mirror Copy of C1OUT bit ; Note 1: PIC16F/LF1823 only. ; ******************************************************* ; SELBANK 2 ; MOVLW B'00000000' ; ; MOVWF CMOUT SELBANK 0 RETURN END