;****************************************************************************************** ; PIC12F1822 Sample Program ; Project : ; Program Name : ; Programer : ; Create date : ; History : ; Laungage : MPLABX PIC-AS / XC8-AS ;****************************************************************************************** ; Description ; 1.System clock ; OSC : Internal OSC 16MHz ; 2.Timing list (Before adjustment with the oscilloscope) ; A/D data ; 1 * 0.005[mS] ==> 0.005 + 0.865 ==> 0.865[mS] (H Puls) / 20[mS] (L Puls) ; 127 * 0.005[mS] ==> 0.635 + 0.865 ==> 1.500[mS] (H Plus) / 20[mS] (L Puls) ; 255 * 0.005[mS] ==> 1.275 + 0.865 ==> 2.140[mS] (H Plus) / 20[mS] (L Puls) ;****************************************************************************************** ; LIST P=PIC12F1822,ST=OFF,R=DEC ; INCLUDE "P12F1822.inc" ; __CONFIG _CONFIG1 , _FOSC_INTOSC & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF ; __CONFIG _CONFIG2 , _WRT_OFF & _PLLEN_OFF & _STVREN_OFF & _BORV_25 & _LVP_OFF PROCESSOR 12F1822 #include config FOSC = INTOSC config WDTE = OFF config PWRTE = OFF config MCLRE = OFF config CP = OFF config CPD = OFF config BOREN = OFF config CLKOUTEN = OFF config IESO = OFF config FCMEN = OFF config WRT = OFF config PLLEN = OFF config STVREN = OFF config BORV = HI config LVP = OFF ; WAT1 EQU 20H WAT2 EQU 21H WAT3 EQU 22H CNT1 EQU 23H CNT2 EQU 24H TIMR1 EQU 25H TIMR2 EQU 26H TMP1 EQU 27H ; ; Define Common RAM AREA (16 bytes) ; TMP_C EQU 70H ADDAT_H EQU 71H ADDAT_L EQU 72H ; Define Macro ;SELBANK MACRO #BANK_NO ; MOVLW #BANK_NO ; MOVWF BSR ; ENDM ORG 0h GOTO START ORG 4h GOTO START START: ; ***************************** ; 1.Initialize ; ***************************** ; (1)Define OSC (16MHz, IntOSC) ; SELBANK 1 ; SET BANK1 MOVLW 1 MOVWF BSR MOVLW 11111010B MOVWF OSCCON ; (2)Define I/O port ; SELBANK 1 ; SET BANK1 MOVLW 1 MOVWF BSR MOVLW 11111011B MOVWF TRISA ; (3)Define ANSELA Register ; SELBANK 3 ; SET BANK3 MOVLW 3 MOVWF BSR ; BSF ANSELA,ANSA0 MOVLW 00000001B MOVWF ANSELA ; (4)Initialized A/D Converter CALL INTADC ; (5)Initializee I/O port ; SELBANK 0 ; SET BANK0 MOVLW 0 MOVWF BSR MOVLW 00000000B MOVWF PORTA ; SELBANK 0 ; SET BANK0 MOVLW 0 MOVWF BSR ; ***************************** ; 2.Program main ; ***************************** MAIN: ; --------------------- ; (1)Generate L Plus ; --------------------- ; 1-1)Put L Plus MOVLW 00000000B MOVWF PORTA ; 1-2)Get A/D data CALL GETADC ; 1-3)Plus Limiter MOVF ADDAT_H,W MOVWF TMP1 MOVLW 245 SUBWF TMP1,F BTFSC STATUS,0 GOTO MAIN1B MOVLW 1H ADDWF ADDAT_H,F GOTO MAIN1C MAIN1B: MOVLW 246 MOVWF ADDAT_H ; 1-4)Wait MAIN1C: CALL WAT1S CALL WAT1S ; ; --------------------- ; (2)Generate H Plus ; --------------------- ; 2-1)Put H Plus MOVLW 00000100B MOVWF PORTA ; 2-2)Wait MOVF ADDAT_H,W CALL TMER2S MOVLW 110 CALL TMER2S GOTO MAIN ;****************************************************************************************** ; Function Name : Timer ; Title : ; Input : ; Output : ; Desiription : 16/4[MHz] ==(40)==> 100[KHz] ==(100)==> 1[KHz] ==(1000)==> 1[Hz] ;****************************************************************************************** TMER2S: ; MOVLW 100 MOVWF TIMR1 TMER2: CALL WAT2S DECFSZ TIMR1,F GOTO TMER2 RETURN ;****************************************************************************************** ; Function Name : WAT ; Title : Timer 1[S] ; Input : ; Output : ; Desiription : 16/4[MHz] ==(40)==> 100[KHz] ==(100)==> 1[KHz] ==(1000)==> 1[Hz] ;****************************************************************************************** WATS: MOVLW 28H ; Decimal 40 MOVWF WAT3 WATC: MOVLW 64H ; Decimal 100 MOVWF WAT2 WATB: MOVLW 64H ; Decimal 100 MOVWF WAT1 WATA: NOP NOP NOP NOP NOP NOP DECFSZ WAT1,F GOTO WATA DECFSZ WAT2,F GOTO WATB DECFSZ WAT3,F GOTO WATC RETURN ;****************************************************************************************** ; Function Name : WAT1S ; Title : Timer 10[mS] ; Input : ; Output : ; Desiription : 16/4[MHz] ==(40)==> 100[KHz] ==(100)==> 100[Hz] ;****************************************************************************************** WAT1S: MOVLW 28H ; Decimal 40 MOVWF WAT2 WAT1B: MOVLW 64H ; Decimal 100 MOVWF WAT1 WAT1A: NOP NOP NOP NOP NOP NOP DECFSZ WAT1,F GOTO WAT1A DECFSZ WAT2,F GOTO WAT1B RETURN ;****************************************************************************************** ; Function Name : WAT2Z ; Title : Timer 0.005[mS] ; Input : ; Output : ; Desiription : 16/4[MHz] ==(20)==> 200[KHz] ;****************************************************************************************** WAT2S: NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP RETURN ;****************************************************************************************** ; Program : INTADC ; Title : ; Input : ; Output : ;****************************************************************************************** INTADC: ; ******************************************************* ; 1.Define ADCON0(A/D CONTROL REGISTER 0) Register ; ADCON0(7) Unimplemented: Read as ?0? ; ADCON0(6-2) CHS<4:0>: Analog Channel Select bits ; 00000 = AN0 ; 00001 = AN1 ; 00010 = AN2 ; 00011 = AN3 ; 00100 = AN4(1) PIC16F/LF1823 only. For PIC12F/LF1822 it is Reserved. No channel connected ; 00101 = AN5(1) PIC16F/LF1823 only. For PIC12F/LF1822 it is Reserved. No channel connected ; 00110 = AN6(1) PIC16F/LF1823 only. For PIC12F/LF1822 it is Reserved. No channel connected ; 00111 = AN7(1) PIC16F/LF1823 only. For PIC12F/LF1822 it is Reserved. No channel connected ; 10001 = Reserved ; . ; 11101 = Reserved ; 11110 = DAC ; 11111 = FVR ; ADCON0(1) GO/DONE: A/D Conversion Status bit ; 1 = A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle. ; This bit is automatically cleared by hardware when the A/D conversion has completed. ; 0 = A/D conversion completed/not in progress ; ADCON0(0) ADON: ADC Enable bit ; 1 = ADC is enabled ; 0 = ADC is disabled and consumes no operating current ; ******************************************************* ; SELBANK 1 ; SET BANK1 MOVLW 1 MOVWF BSR MOVLW 00000001B MOVWF ADCON0 ; ******************************************************* ; 2.Define ADCON1(A/D CONTROL REGISTER 1) Register ; ADCON1(7) ADFM: A/D Result Format Select bit ; 1 = Right justified. Six Most Significant bits of ADRESH are set to 0 when the conversion result is loaded. ; 0 = Left justified. Six Least Significant bits of ADRESL are set to 0 when the conversion result is loaded. ; ADCON1(6-4) ADCS<2:0>: A/D Conversion Clock Select bits ; 000 = FOSC/2 ; 001 = FOSC/8 ; 010 = FOSC/32 ; 011 = FRC (clock supplied from a dedicated RC oscillator) ; 100 = FOSC/4 ; 101 = FOSC/16 ; 110 = FOSC/64 ; 111 = FRC (clock supplied from a dedicated RC oscillator) ; ADCON1(3-2) Unimplemented: Read as ?0? ; ADCON1(1-0) ADPREF<1:0>: A/D Positive Voltage Reference Configuration bits ; 00 = VREF+ is connected to AVDD ; 01 = Reserved ; 10 = VREF+ is connected to external VREF+ ; 11 = VREF+ is connected to internal fixed voltage reference ; ******************************************************* ; SELBANK 1 ; SET BANK1 MOVLW 1 MOVWF BSR ; MOVLW 11100000B MOVLW 00010000B MOVWF ADCON1 ; SELBANK 0 ; SET BANK0 MOVLW 0 MOVWF BSR RETURN ;****************************************************************************************** ; Function Name : GETADC ; Title : ; Input : ; Output : ADDAT_H,ADDAT_L ;****************************************************************************************** GETADC: ; ***************** ; 1.Start A/D Converter ; ***************** ; (1)GO/DONE: A/D Conversion Status bit ; SELBANK 1 ; SET BANK1 MOVLW 1 MOVWF BSR ; BSF ADCON0,GO_NOT_DONE BSF ADCON0,1 ; ***************** ; 2.Get data ; ***************** ; (1)Wait for the ADC start flag to complete ; SELBANK 1 ; SET BANK1 MOVLW 1 MOVWF BSR ; BTFSC ADCON0,GO_NOT_DONE BTFSC ADCON0,1 GOTO $-1 ; (2)Substitute the result ; SELBANK 1 ; SET BANK1 MOVLW 1 MOVWF BSR MOVF ADRESH,W MOVWF ADDAT_H MOVF ADRESL,W MOVWF ADDAT_L ; SELBANK 0 ; SET BANK0 MOVLW 0 MOVWF BSR RETURN END