;****************************************************************************************** ; PIC18F14K50 Sample Program ; Project : ; Program Name : ; Programer : ; Create date : Version 1.0 H22.08.20 ; History : ; Laungage : MPLAB MPASM ;****************************************************************************************** ; (1)Description ; ;****************************************************************************************** LIST P=PIC18F14K50,ST=OFF,R=DEC INCLUDE "P18F14K50.inc" config CPUDIV = NOCLKDIV ;CPU System Clock Selection bit(No CPU System Clock divide) config USBDIV = OFF ;USB Clock Selection bit(USB Clock comes directly from the OSC1/OSC2 oscillator block; no divide) config FOSC = HS ;Oscillator Selection bits(HS oscillator) config PLLEN = ON ;X PLL Enable bit(Oscillator multiplied by 4) config PCLKEN = OFF ;Primary Clock Enable Bit(Primary clock is under software control) config FCMEN = OFF config IESO = OFF ;Internal/External Oscillator Switchover bit(Oscillator Switchover mode disabled) config PWRTEN = OFF,BOREN = OFF,BORV = 19 config WDTEN = OFF,WDTPS = 1 config MCLRE = OFF ;MCLR Pin Enable bit(RE3 input pin enabled; MCLR disabled) config HFOFST = OFF,STVREN = OFF,LVP = OFF,BBSIZ = OFF,XINST = OFF config CP0 = OFF,CP1 = OFF,CPB = OFF,CPD = OFF,WRT0 = OFF,WRT1 = OFF,WRTB = OFF,WRTC = OFF,WRTD = OFF,EBTR0 = OFF,EBTR1 = OFF,EBTRB = OFF ; ; PUTMES MACRO #IN_CHAR MOVLW #IN_CHAR CALL SNDUART ENDM ; ; TMP_C EQU 00H INTWRG EQU 01H INTSTS EQU 02H ; ; ORG 0h GOTO START ORG 8h GOTO INTFNC ORG 18h GOTO INTFNC INTFNC ; ***************************** ; 0.Interrupts ; ***************************** MOVWF INTWRG ; W-REGの値を保存 SWAPF STATUS,W ; STATUSレジスタの値を保存 MOVWF INTSTS ; STATUSレジスタの値を保存 ; CALL INTRUP ; SWAPF INTSTS,W ; STATUSレジスタの値を復元 MOVWF STATUS ; STATUSレジスタの値を復元 MOVF INTWRG,W ; W-REGレジスタの値を復元 RETFIE START ; ***************************** ; 1.Initialized Segment ; ***************************** ; (1)Define I/O port MOVLW H'FF' MOVWF TRISA MOVLW H'FF' MOVWF TRISB MOVLW H'FF' MOVWF TRISC ; (2)Initialize EUSAR CALL INTUART ; ***************************** ; 2.Program main ; ***************************** ; (1)Send Message CALL DEMO01 ; (2)Main loop MAIN GOTO MAIN ;****************************************************************************************** ; Program : DEMO01 ; Title : ; Input : ; Output : ;****************************************************************************************** DEMO01 PUTMES ' ' PUTMES 'P' PUTMES 'I' PUTMES 'C' PUTMES '1' PUTMES '8' PUTMES 'F' PUTMES '1' PUTMES '4' PUTMES 'K' PUTMES '5' PUTMES '0' PUTMES ' ' PUTMES 'C' PUTMES 'o' PUTMES 'n' PUTMES 'n' PUTMES 'e' PUTMES 'c' PUTMES 't' PUTMES 'e' PUTMES 'd' PUTMES ' ' PUTMES 'O' PUTMES 'K' PUTMES '>' PUTMES ' ' RETURN ;****************************************************************************************** ; Program : INTUART ; Title : ; Input : ; Output : ; Description : Fosc:48MHz, Baud Rate:9600BPS, 16-bit Baud Rate ;****************************************************************************************** INTUART ; ******************************************************* ; 0.Define ANSELH(ANALOG SELECT REGISTER 2) ; ANSELH(3) ANS11: RB5 Analog Select Control bit ; 0 = Digital input buffer of RB5 is enabled ; ******************************************************* BCF ANSELH,ANS11 ; ******************************************************* ; 1.Define Interrupts ; Timer1 interrupt, if enabled, is generated on overflow, which is latched in the TMR1IF ; interrupt flag bit of the PIR1 register. This interrupt can be enabled or disabled ; by setting or clearing the TMR1IE Interrupt Enable bit of the PIE1 register. ; ******************************************************* ; (1)Define INTCON(INTERRUPT CONTROL)Register ; INTCON(7) GIE/GIEH(Global Interrupt Enable bit) ; INTCON(6) PEIE/GIEL(Peripheral Interrupt Enable bit) ; 1 = Enables, 0 = Disables BSF INTCON,GIE BSF INTCON,PEIE ; (2)Define PIR1(PERIPHERAL INTERRUPT REQUEST)Register ; PIR1(5) RCIF(EUSART Receive Interrupt Flag bit) ; 1 = Enables, 0 = Disables BCF PIR1,RCIF ; (3)Define PIE1(PERIPHERAL INTERRUPT ENABLE)Register ; PIE1(5) RCIE(EUSART Receive Interrupt Enable bit) ; 1 = Enables, 0 = Disables BSF PIE1,RCIE ; (4)Define IPR1(PERIPHERAL INTERRUPT PRIORITY REGISTER 1) ; IPR1(5) RCIP(EUSART Receive Interrupt Priority bit) ; 1 = High priority, 0 = Low priority ; BSF IPR1,RCIP ; ******************************************************* ; 1.Define TXSTA(TRANSMIT STATUS AND CONTROL) Register ; TXSTA(7) CSRC: Clock Source Select bit ; Asynchronous mode:Don’t care ; TXSTA(6) TX9: 9-bit Transmit Enable bit ; 1 = Selects 9-bit transmission ; 0 = Selects 8-bit transmission ; TXSTA(5) TXEN: Transmit Enable bit(1) ; 1 = Transmit enabled ; 0 = Transmit disabled ; TXSTA(4) SYNC: EUSART Mode Select bit ; 1 = Synchronous mode ; 0 = Asynchronous mode ; TXSTA(3) SENDB: Send Break Character bit ; Asynchronous mode: ; 1 = Send Sync Break on next transmission (cleared by hardware upon completion) ; 0 = Sync Break transmission completed ; TXSTA(2) BRGH: High Baud Rate Select bit ; Asynchronous mode: ; 1 = High speed ; 0 = Low speed ; TXSTA(1) TRMT: Transmit Shift Register Status bit ; 1 = TSR empty ; 0 = TSR full ; TXSTA(0) TX9D: Ninth bit of Transmit Data ; Can be address/data bit or a parity bit. ; ******************************************************* MOVLW B'00100100' MOVWF TXSTA ; ******************************************************* ; 2.Define RCSTA(RECEIVE STATUS AND CONTROL) Register ; RCSTA(7) SPEN: Serial Port Enable bit ; 1 = Serial port enabled (configures RX/DT and TX/CK pins as serial port pins) ; 0 = Serial port disabled (held in Reset) ; RCSTA(6) RX9: 9-bit Receive Enable bit ; 1 = Selects 9-bit reception ; 0 = Selects 8-bit reception ; RCSTA(5) SREN: Single Receive Enable bit ; Asynchronous mode: ; Don’t care ; RCSTA(4) CREN: Continuous Receive Enable bit ; Asynchronous mode: ; 1 = Enables receiver ; 0 = Disables receiver ; RCSTA(3) ADDEN: Address Detect Enable bit ; Asynchronous mode 9-bit (RX9 = 1): ; 1 = Enables address detection, enable interrupt and load the receive buffer when RSR<8> is set ; 0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit ; Asynchronous mode 8-bit (RX9 = 0): ; Don’t care ; RCSTA(2) FERR: Framing Error bit ; 1 = Framing error (can be updated by reading RCREG register and receive next valid byte) ; 0 = No framing error ; RCSTA(1) OERR: Overrun Error bit ; 1 = Overrun error (can be cleared by clearing bit CREN) ; 0 = No overrun error ; RCSTA(0) RX9D: Ninth bit of Received Data ; This can be address/data bit or a parity bit and must be calculated by user firmware. ; ******************************************************* MOVLW B'10010000' MOVWF RCSTA ; ******************************************************* ; 3.Define BAUDCON(BAUD RATE CONTROL) Register ; BAUDCON(7) ABDOVF: Auto-Baud Detect Overflow bit ; Asynchronous mode: ; 1 = Auto-baud timer overflowed ; 0 = Auto-baud timer did not overflow ; BAUDCON(6) RCIDL: Receive Idle Flag bit ; Asynchronous mode: ; 1 = Receiver is Idle ; 0 = Start bit has been detected and the receiver is active ; BAUDCON(5) DTRXP: Data/Receive Polarity Select bit ; Asynchronous mode: ; 1 = Receive data (RX) is inverted (active-low) ; 0 = Receive data (RX) is not inverted (active-high) ; BAUDCON(4) CKTXP: Clock/Transmit Polarity Select bit ; Asynchronous mode: ; 1 = Idle state for transmit (TX) is low ; 0 = Idle state for transmit (TX) is high ; BAUDCON(3) BRG16: 16-bit Baud Rate Generator bit ; 1 = 16-bit Baud Rate Generator is used (SPBRGH:SPBRG) ; 0 = 8-bit Baud Rate Generator is used (SPBRG) ; BAUDCON(2) Unimplemented: Read as ‘0’ ; BAUDCON(1) WUE: Wake-up Enable bit ; Asynchronous mode: ; 1 = Receiver is waiting for a falling edge. No character will be received but RCIF will be set on ; the falling edge. WUE will automatically clear on the rising edge. ; 0 = Receiver is operating normally ; BAUDCON(0) ABDEN: Auto-Baud Detect Enable bit ; Asynchronous mode: ; 1 = Auto-Baud Detect mode is enabled (clears when auto-baud is complete) ; 0 = Auto-Baud Detect mode is disabled ; ******************************************************* MOVLW B'00001000' MOVWF BAUDCON ; ******************************************************* ; 3.Define BRG(EUSART Baud Rate Generator Register) Register ; ******************************************************* ; BRG = 48000000(Hz)/4/9600(BPS)-1 ==> 0d1249 ==> 0x4E1 ; (1)Define SPBRGH(EUSART Baud Rate Generator Register, High Byte) Register MOVLW H'04' MOVWF SPBRGH ; (2)Define SPBRG(EUSART Baud Rate Generator Register, Low Byte) Register MOVLW H'E1' MOVWF SPBRG RETURN ;****************************************************************************************** ; Program : RECUART ; Title : ; Input : ; Output : ;****************************************************************************************** RECUART ; **************************** ; 1.Check Recvive Flag ; **************************** BCF PIR1,RCIF RECUART_1 BTFSS PIR1,RCIF GOTO RECUART_1 ; **************************** ; 2.Check error ; **************************** BTFSS RCSTA,FERR GOTO RECUART_2 MOVLW H'00' RETURN RECUART_2 BTFSS RCSTA,OERR GOTO RECUART_3 MOVLW H'00' RETURN RECUART_3 ; **************************** ; 3.Set Recive Data ; **************************** MOVF RCREG,W RETURN ;****************************************************************************************** ; Program : SNDUART ; Title : ; Input : ; Output : ;****************************************************************************************** SNDUART MOVWF TMP_C ; *************************** ; 1.Check Send Flag ; *************************** SNDUART_1 BTFSS TXSTA,TRMT GOTO SNDUART_1 ; *************************** ; 2.Set data ; *************************** MOVF TMP_C,W MOVWF TXREG RETURN ;****************************************************************************************** ; Function Name : INTRUP ; Title : Interrupts Function ; Input : ; Output : ;****************************************************************************************** INTRUP: CALL RECUART CALL SNDUART RETURN END