;****************************************************************************************** ; PIC12F1822 Sample Program ; Project : ; Program Name : ; Programer : ; Create date : Version 1.0 H23.02.10 ; History : ; Laungage : MPLAB MPASM ;****************************************************************************************** ; (1)Description ; OSC : Internal OSC 32MHz ;****************************************************************************************** LIST P=PIC12F1822,ST=OFF,R=DEC INCLUDE "P12F1822.inc" __CONFIG _CONFIG1 , _FOSC_INTOSC & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF __CONFIG _CONFIG2 , _WRT_OFF & _PLLEN_ON & _STVREN_OFF & _BORV_25 & _LVP_OFF ; ; Define GENERAL PURPOSE RAM AREA (80 bytes maximum) ; WAT1M1 EQU 20H ; ; Define Common RAM AREA (16 bytes) ; TMP_C EQU 70H ; Define Macro SELBANK MACRO #BANK_NO MOVLW #BANK_NO MOVWF BSR ENDM ORG 0h GOTO START ORG 4h GOTO START START ; ***************************** ; 1.Initialized Segment ; ***************************** ; (1)Define OSC (32MHz, IntOSC) SELBANK 1 ; SET BANK1 MOVLW B'11110000' MOVWF OSCCON ; (2)Define I/O port SELBANK 1 ; SET BANK1 MOVLW B'11111111' MOVWF TRISA ; (3)Define APFCON Register SELBANK 2 ; SET BANK2 BSF APFCON,RXDTSEL ; RX ==> RA5 BSF APFCON,TXCKSEL ; TX ==> RA4 ; (3)Initialized EUART CALL INTUART ; (4)Demo Message CALL DEMO01 SELBANK 0 ; SET BANK0 ; ***************************** ; 2.Program main ; ***************************** ; (1)Main loop MAIN CALL RECUART CALL SNDUART GOTO MAIN ;****************************************************************************************** ; Program : DEMO01 ; Title : ; Input : ; Output : ;****************************************************************************************** DEMO01 MOVLW ' ' CALL SNDUART MOVLW 'P' CALL SNDUART MOVLW 'I' CALL SNDUART MOVLW 'C' CALL SNDUART MOVLW '1' CALL SNDUART MOVLW '2' CALL SNDUART MOVLW 'F' CALL SNDUART MOVLW '1' CALL SNDUART MOVLW '8' CALL SNDUART MOVLW '2' CALL SNDUART MOVLW '2' CALL SNDUART MOVLW ' ' CALL SNDUART MOVLW 'C' CALL SNDUART MOVLW 'o' CALL SNDUART MOVLW 'n' CALL SNDUART MOVLW 'n' CALL SNDUART MOVLW 'e' CALL SNDUART MOVLW 'c' CALL SNDUART MOVLW 't' CALL SNDUART MOVLW 'e' CALL SNDUART MOVLW 'd' CALL SNDUART MOVLW ' ' CALL SNDUART MOVLW 'O' CALL SNDUART MOVLW 'K' CALL SNDUART MOVLW '>' CALL SNDUART MOVLW ' ' CALL SNDUART RETURN ;****************************************************************************************** ; Program : INTUART ; Title : ; Input : ; Output : ; Description : Fosc:32MHz, Baud Rate:9600BPS, 16-bit Baud Rate ;****************************************************************************************** INTUART ; ******************************************************* ; 1.Define TXSTA(TRANSMIT STATUS AND CONTROL) Register ; TXSTA(7) CSRC: Clock Source Select bit ; Asynchronous mode:Donft care ; TXSTA(6) TX9: 9-bit Transmit Enable bit ; 1 = Selects 9-bit transmission ; 0 = Selects 8-bit transmission ; TXSTA(5) TXEN: Transmit Enable bit(1) ; 1 = Transmit enabled ; 0 = Transmit disabled ; TXSTA(4) SYNC: EUSART Mode Select bit ; 1 = Synchronous mode ; 0 = Asynchronous mode ; TXSTA(3) SENDB: Send Break Character bit ; Asynchronous mode: ; 1 = Send Sync Break on next transmission (cleared by hardware upon completion) ; 0 = Sync Break transmission completed ; TXSTA(2) BRGH: High Baud Rate Select bit ; Asynchronous mode: ; 1 = High speed ; 0 = Low speed ; TXSTA(1) TRMT: Transmit Shift Register Status bit ; 1 = TSR empty ; 0 = TSR full ; TXSTA(0) TX9D: Ninth bit of Transmit Data ; Can be address/data bit or a parity bit. ; ******************************************************* SELBANK 3 ; SET BANK3 MOVLW B'00100100' MOVWF TXSTA ; ******************************************************* ; 2.Define RCSTA(RECEIVE STATUS AND CONTROL) Register ; RCSTA(7) SPEN: Serial Port Enable bit ; 1 = Serial port enabled (configures RX/DT and TX/CK pins as serial port pins) ; 0 = Serial port disabled (held in Reset) ; RCSTA(6) RX9: 9-bit Receive Enable bit ; 1 = Selects 9-bit reception ; 0 = Selects 8-bit reception ; RCSTA(5) SREN: Single Receive Enable bit ; Asynchronous mode: ; Donft care ; RCSTA(4) CREN: Continuous Receive Enable bit ; Asynchronous mode: ; 1 = Enables receiver ; 0 = Disables receiver ; RCSTA(3) ADDEN: Address Detect Enable bit ; Asynchronous mode 9-bit (RX9 = 1): ; 1 = Enables address detection, enable interrupt and load the receive buffer when RSR<8> is set ; 0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit ; Asynchronous mode 8-bit (RX9 = 0): ; Donft care ; RCSTA(2) FERR: Framing Error bit ; 1 = Framing error (can be updated by reading RCREG register and receive next valid byte) ; 0 = No framing error ; RCSTA(1) OERR: Overrun Error bit ; 1 = Overrun error (can be cleared by clearing bit CREN) ; 0 = No overrun error ; RCSTA(0) RX9D: Ninth bit of Received Data ; This can be address/data bit or a parity bit and must be calculated by user firmware. ; ******************************************************* MOVLW B'10010000' MOVWF RCSTA ; ******************************************************* ; 3.Define BAUDCON(BAUD RATE CONTROL) Register ; BAUDCON(7) ABDOVF: Auto-Baud Detect Overflow bit ; Asynchronous mode: ; 1 = Auto-baud timer overflowed ; 0 = Auto-baud timer did not overflow ; BAUDCON(6) RCIDL: Receive Idle Flag bit ; Asynchronous mode: ; 1 = Receiver is Idle ; 0 = Start bit has been detected and the receiver is active ; BAUDCON(5) Unimplemented: Read as e0f ; BAUDCON(4) SCKP: Synchronous Clock Polarity Select bit ; Asynchronous mode: ; 1 = Transmit inverted data ; 0 = Transmit non-inverted data ; BAUDCON(3) BRG16: 16-bit Baud Rate Generator bit ; 1 = 16-bit Baud Rate Generator is used (SPBRGH:SPBRG) ; 0 = 8-bit Baud Rate Generator is used (SPBRG) ; BAUDCON(2) Unimplemented: Read as e0f ; BAUDCON(1) WUE: Wake-up Enable bit ; Asynchronous mode: ; 1 = Receiver is waiting for a falling edge. No character will be received but RCIF will be set on ; the falling edge. WUE will automatically clear on the rising edge. ; 0 = Receiver is operating normally ; BAUDCON(0) ABDEN: Auto-Baud Detect Enable bit ; Asynchronous mode: ; 1 = Auto-Baud Detect mode is enabled (clears when auto-baud is complete) ; 0 = Auto-Baud Detect mode is disabled ; ******************************************************* MOVLW B'00001000' MOVWF BAUDCON ; ******************************************************* ; 3.Define BRG(EUSART Baud Rate Generator Register) Register ; ******************************************************* ; BRG = 16000000(Hz)/4/9600(BPS)-1 ==> 0d0416 ==> 0x1A0 ; BRG = 32000000(Hz)/4/9600(BPS)-1 ==> 0d0832 ==> 0x340 ; (1)Define SPBRGH(EUSART Baud Rate Generator Register, High Byte) Register MOVLW H'03' MOVWF SPBRGH ; (2)Define SPBRG(EUSART Baud Rate Generator Register, Low Byte) Register MOVLW H'40' MOVWF SPBRG ; SELBANK 0 ; SET BANK0 ; ******************************************************* ; 4.Wait ( 32MHz mode only ) ; ******************************************************* MOVLW H'FF' CALL WAT1M RETURN ;****************************************************************************************** ; Program : RECUART ; Title : ; Input : ; Output : W-reg ;****************************************************************************************** RECUART ; **************************** ; 1.Check Recvive Flag ; **************************** SELBANK 0 ; SET BANK0 BCF PIR1,RCIF ; BTFSS PIR1,RCIF GOTO $-1 ; **************************** ; 2.Check error ; **************************** SELBANK 3 ; SET BANK3 BTFSS RCSTA,FERR GOTO RECUART_2 ; SELBANK 0 ; SET BANK0 MOVLW H'00' RETURN RECUART_2 BTFSS RCSTA,OERR GOTO RECUART_3 ; SELBANK 0 ; SET BANK0 MOVLW H'00' RETURN RECUART_3 ; **************************** ; 3.Set Recive Data ; **************************** MOVF RCREG,W MOVWF TMP_C SELBANK 0 ; SET BANK0 MOVFW TMP_C RETURN ;****************************************************************************************** ; Program : SNDUART ; Title : ; Input : W-reg ; Output : ;****************************************************************************************** SNDUART MOVWF TMP_C ; *************************** ; 1.Check Send Flag ; *************************** SELBANK 3 ; SET BANK3 BTFSS TXSTA,TRMT GOTO $-1 ; *************************** ; 2.Set data ; *************************** MOVF TMP_C,W MOVWF TXREG SELBANK 0 ; SET BANK0 RETURN ;************************************************************************************ ; Function Name : WAT1M ; Title : Wait 1[m] ; Input : W-reg ; Output : ;************************************************************************************ WAT1M ; MOVLW H'64' MOVWF WAT1M1 WAT1MA CALL TIMER DECFSZ WAT1M1,F GOTO WAT1MA RETURN ;************************************************************************************ ; Function Name : TIMER ; Title : Wait 0.001[S] ; Input : ; Output : ;************************************************************************************ TIMER ; ******************************************************* ; 1.Define T1CON(TIMER1 CONTROL REGISTER) Register ; T1CON(7-6) TMR1CS1,TMR1CS0: Timer1 Clock Source Select bits ; 11 =Timer1 clock source is Capacitive Sensing Oscillator (CAPOSC) ; 10 =Timer1 clock source is pin or oscillator: ; If T1OSCEN = 0: ; External clock from T1CKI pin (on the rising edge) ; If T1OSCEN = 1: ; Crystal oscillator on T1OSI/T1OSO pins ; 01 =Timer1 clock source is system clock (FOSC) ; 00 =Timer1 clock source is instruction clock (FOSC/4) ; T1CON(5-4) T1CKPS1,T1CKPS0: Timer1 Input Clock Prescale Select bits ; 11 = 1:8 Prescale value ; 10 = 1:4 Prescale value ; 01 = 1:2 Prescale value ; 00 = 1:1 Prescale value ; T1CON(3) T1OSCEN: LP Oscillator Enable Control bit ; 1 = Dedicated Timer1 oscillator circuit enabled ; 0 = Dedicated Timer1 oscillator circuit disabled ; T1CON(2) T1SYNC: Timer1 External Clock Input Synchronization Control bit ; TMR1CS1,TMR1CS0 = 1X ; 1 = Do not synchronize external clock input ; 0 = Synchronize external clock input with system clock (FOSC) ; TMR1CS1,TMR1CS0 = 0X ; This bit is ignored. Timer1 uses the internal clock when TMR1CS<1:0> = 1X. ; T1CON(1) Unimplemented: Read as e0f ; T1CON(0) TMR1ON: Timer1 On bit ; 1 = Enables Timer1 ; 0 = Stops Timer1 ; Clears Timer1 Gate flip-flop ; ******************************************************* SELBANK 0 ; SET BANK0 MOVLW B'00010001' MOVWF T1CON ; ******************************************************* ; 2.Define T1GCON (TIMER1 GATE CONTROL REGISTER) Register ; T1GCON(7) TMR1GE: Timer1 Gate Enable bit ; If TMR1ON = 0: ; This bit is ignored ; If TMR1ON = 1: ; 1 = Timer1 counting is controlled by the Timer1 gate function ; 0 = Timer1 counts regardless of Timer1 gate function ; T1GCON(6) T1GPOL: Timer1 Gate Polarity bit ; 1 = Timer1 gate is active-high (Timer1 counts when gate is high) ; 0 = Timer1 gate is active-low (Timer1 counts when gate is low) ; T1GCON(5) T1GTM: Timer1 Gate Toggle Mode bit ; 1 = Timer1 Gate Toggle mode is enabled ; 0 = Timer1 Gate Toggle mode is disabled and toggle flip-flop is cleared ; Timer1 gate flip-flop toggles on every rising edge. ; T1GCON(4) T1GSPM: Timer1 Gate Single-Pulse Mode bit ; 1 = Timer1 gate Single-Pulse mode is enabled and is controlling Timer1 gate ; 0 = Timer1 gate Single-Pulse mode is disabled ; T1GCON(3) T1GGO/DONE: Timer1 Gate Single-Pulse Acquisition Status bit ; 1 = Timer1 gate single-pulse acquisition is ready, waiting for an edge ; 0 = Timer1 gate single-pulse acquisition has completed or has not been started ; This bit is automatically cleared when T1GSPM is cleared. ; T1GCON(2) T1GVAL: Timer1 Gate Current State bit ; Indicates the current state of the Timer1 gate that could be provided to TMR1H:TMR1L. ; Unaffected by Timer1 Gate Enable (TMR1GE). ; T1GCON(1-0) T1GSS1,T1GSS0: Timer1 Gate Source Select bits ; 00 = Timer1 Gate pin ; 01 = Timer0 overflow output ; 10 = Comparator 1 optionally synchronized output (SYNCC1OUT) ; 11 = Comparator 2 optionally synchronized output (SYNCC2OUT) ; ******************************************************* MOVLW B'00000000' MOVWF T1GCON ; ******************************************************* ; 3.Define TMR1 Register ; ******************************************************* ; TMR1 data ( OSC:16MHz, FOSC/4, 1:8 Prescale value, 0.01[S];100Hz ) ; 10mS(100Hz): 16MHz / 4(FOSC/4) / 8(Prescale) / 100(100Hz)==> 0d5,000(Count) ==> 0x1388(Count) ; TMR1 = 0xFFFF - 0x1388 ==> 0xEC77 ; TMR1 data ( OSC:16MHz, FOSC/4, 1:8 Prescale value, 0.1[S];10Hz ) ; 100mS(10Hz): 16MHz / 4(FOSC/4) / 8(Prescale) / 10(10Hz) ==> 0d50,000(Count) ==> 0xC350(Count) ; TMR1 = 0xFFFF - 0xC350 ==> 0x3CAF ; TMR1 data ( OSC:16MHz, FOSC/4, 1:1 Prescale value, 0.001[S];1000Hz ) ; 1mS(1000Hz): 16MHz / 4(FOSC/4) / 1(Prescale) / 1000(Hz)==> 0d4,000(Count) ==> 0x0FA0(Count) ; TMR1 = 0xFFFF - 0x0FA0 ==> 0xF05F ; TMR1 data ( OSC:32MHz, FOSC/4, 1:2 Prescale value, 0.001[S];1000Hz ) ; 1mS(1000Hz): 32MHz / 4(FOSC/4) / 2(Prescale) / 1000(Hz)==> 0d4,000(Count) ==> 0x0FA0(Count) ; TMR1 = 0xFFFF - 0x0FA0 ==> 0xF05F MOVLW H'F0' MOVWF TMR1H MOVLW H'5F' MOVWF TMR1L ; ******************************************************* ; 4.Timer ; ******************************************************* BCF PIR1,TMR1IF BTFSS PIR1,TMR1IF GOTO $-1 RETURN END