;****************************************************************************************** ; PIC12F1822 Sample Program ; Project : ; Program Name : ; Programer : ; Create date : Version 1.0 H23.02.10 ; History : ; Laungage : MPLAB MPASM ;****************************************************************************************** ; (1)Description ; OSC : Internal OSC 16MHz ;****************************************************************************************** LIST P=PIC12F1822,ST=OFF,R=DEC INCLUDE "P12F1822.inc" __CONFIG _CONFIG1 , _FOSC_INTOSC & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF __CONFIG _CONFIG2 , _WRT_OFF & _PLLEN_OFF & _STVREN_OFF & _BORV_25 & _LVP_OFF ; ; Define GENERAL PURPOSE RAM AREA (80 bytes maximum) ; N000 EQU 20H N001 EQU 21H N002 EQU 22H N003 EQU 23H WAT1 EQU 24H WAT2 EQU 25H WAT3 EQU 26H CNT1 EQU 27H CNT2 EQU 28H ; ; Define Common RAM AREA (16 bytes) ; TMP_C EQU 70H ADDAT_H EQU 71H ADDAT_L EQU 72H ; Define Macro SELBANK MACRO #BANK_NO MOVLW #BANK_NO MOVWF BSR ENDM ORG 0h GOTO START ORG 4h GOTO START START ; ***************************** ; 1.Initialized Segment ; ***************************** ; (1)Define OSC (16MHz, IntOSC) SELBANK 1 ; SET BANK1 MOVLW B'11111010' MOVWF OSCCON ; (2)Define I/O port SELBANK 1 ; SET BANK1 MOVLW B'11111111' MOVWF TRISA ; (3)Define ANSELA Register SELBANK 3 ; SET BANK3 BSF ANSELA,ANSA0 ; (4)Define APFCON Register SELBANK 2 ; SET BANK2 BSF APFCON,RXDTSEL ; RX ==> RA5 BSF APFCON,TXCKSEL ; TX ==> RA4 ; (5)Initialized EUART CALL INTUART ; (6)Initialized A/D Converter CALL INTADC ; (7)Demo Message CALL DEMO01 SELBANK 0 ; SET BANK0 ; ***************************** ; 2.Program main ; ***************************** MAIN ; (1)Main Process CALL ADMAIN ; (2)Wait CALL WAT GOTO MAIN ;****************************************************************************************** ; Program : DEMO01 ; Title : ; Input : ; Output : ;****************************************************************************************** DEMO01 MOVLW ' ' CALL SNDUART MOVLW 'P' CALL SNDUART MOVLW 'I' CALL SNDUART MOVLW 'C' CALL SNDUART MOVLW '1' CALL SNDUART MOVLW '2' CALL SNDUART MOVLW 'F' CALL SNDUART MOVLW '1' CALL SNDUART MOVLW '8' CALL SNDUART MOVLW '2' CALL SNDUART MOVLW '2' CALL SNDUART MOVLW ' ' CALL SNDUART MOVLW 'C' CALL SNDUART MOVLW 'o' CALL SNDUART MOVLW 'n' CALL SNDUART MOVLW 'n' CALL SNDUART MOVLW 'e' CALL SNDUART MOVLW 'c' CALL SNDUART MOVLW 't' CALL SNDUART MOVLW 'e' CALL SNDUART MOVLW 'd' CALL SNDUART MOVLW ' ' CALL SNDUART MOVLW 'O' CALL SNDUART MOVLW 'K' CALL SNDUART MOVLW '>' CALL SNDUART MOVLW ' ' CALL SNDUART RETURN ;****************************************************************************************** ; Function Name : ADMAIN ; Title : ; Input : ; Output : ;****************************************************************************************** ADMAIN ; (1)Get A/D-Converter-data CALL GETADC ; (2)Edit data CALL HEXDEC ; (3)Put data CALL ADPUT RETURN ;****************************************************************************************** ; Function Name : ADPUT ; Title : ; Input : ; Output : ;****************************************************************************************** ADPUT ; ********************************** ; 1.測定結果を出力 ; ********************************** MOVFW N003 CALL SNDUART ; MOVFW N002 CALL SNDUART ; MOVFW N001 CALL SNDUART ; MOVFW N000 CALL SNDUART ; MOVLW '0' CALL SNDUART ; ; ********************************** ; 2.見出しを出力 ; ********************************** MOVLW '[' CALL SNDUART MOVLW 'm' CALL SNDUART MOVLW 'V' CALL SNDUART MOVLW ']' CALL SNDUART MOVLW ' ' CALL SNDUART MOVLW ' ' CALL SNDUART RETURN ;****************************************************************************************** ; Function Name : HEXDEC ; Title : Hex => Hex decimal (Chararacter) ; Input : ADDAT_H,ADDAT_L (From GETADC) ; Output : N000-N003 ;****************************************************************************************** ; ******************************** ; 1.16進数を10進数に変換する ; ******************************** HEXDEC CLRF N000 CLRF N001 CLRF N002 CLRF N003 MOVFW ADDAT_H XORLW H'00' BTFSC STATUS,Z GOTO HEXDEE ; MOVFW ADDAT_H MOVWF CNT2 HEXDEC2 MOVLW H'FF' MOVWF CNT1 CALL CNTDEC HEXDEC1 CALL CNTDEC DECFSZ CNT1,F GOTO HEXDEC1 DECFSZ CNT2,F GOTO HEXDEC2 ; HEXDEE MOVFW ADDAT_L XORLW H'00' BTFSC STATUS,Z GOTO HEXFMT MOVFW ADDAT_L MOVWF CNT1 HEXDEE1 CALL CNTDEC DECFSZ CNT1,F GOTO HEXDEE1 ; ******************************** ; 2.キャラクタ型に変換する ; ******************************** HEXFMT ; MOVFW N000 CALL CNVCHR MOVWF N000 ; MOVFW N001 CALL CNVCHR MOVWF N001 ; MOVFW N002 CALL CNVCHR MOVWF N002 ; MOVFW N003 CALL CNVCHR MOVWF N003 RETURN ;****************************************************************************************** ; Function Name : CNTDEC ; Title : Decimal Counter ; Input : N000-N003 ; Output : N000-N003 ;****************************************************************************************** CNTDEC MOVLW H'01' ADDWF N000,F ; 1桁目10進カウンタ(0aで桁上げ) MOVFW N000 XORLW H'0A' BTFSS STATUS,Z RETURN ; CLRF N000 MOVLW H'01' ADDWF N001,F ; 2桁目10進カウンタ(0aで桁上げ) MOVFW N001 XORLW H'0A' BTFSS STATUS,Z RETURN ; CLRF N001 MOVLW H'01' ADDWF N002,F ; 3桁目10進カウンタ(0aで桁上げ) MOVFW N002 XORLW H'0A' BTFSS STATUS,Z RETURN ; CLRF N002 MOVLW H'01' ADDWF N003,F ; 4桁目10進カウンタ(0aで桁上げ) MOVFW N003 XORLW H'0A' BTFSS STATUS,Z RETURN ; CLRF N003 RETURN ;****************************************************************************************** ; Function Name : CNVCHR ; Title : キャラクターコード(数字型)へ変換 ; Input : W-reg ; Output : W-reg ;****************************************************************************************** CNVCHR ANDLW B'00001111' IORLW B'00110000' RETURN ;****************************************************************************************** ; Function Name : WAT ; Title : Timer ; Input : ; Output : ; Desiription : 16/4[MHz] ==(40)==> 100[KHz] ==(100)==> 1[KHz] ==(1000)==> 1[Hz] ;****************************************************************************************** WAT MOVLW H'28' ; Decimal 40 MOVWF WAT3 WATC MOVLW H'64' ; Decimal 100 MOVWF WAT2 WATB MOVLW H'64' ; Decimal 100 MOVWF WAT1 WATA NOP NOP NOP NOP NOP NOP DECFSZ WAT1,F GOTO WATA DECFSZ WAT2,F GOTO WATB DECFSZ WAT3,F GOTO WATC RETURN ;****************************************************************************************** ; Program : INTUART ; Title : ; Input : ; Output : ; Description : Fosc:32MHz, Baud Rate:9600BPS, 16-bit Baud Rate ;****************************************************************************************** INTUART ; ******************************************************* ; 1.Define TXSTA(TRANSMIT STATUS AND CONTROL) Register ; TXSTA(7) CSRC: Clock Source Select bit ; Asynchronous mode:Don’t care ; TXSTA(6) TX9: 9-bit Transmit Enable bit ; 1 = Selects 9-bit transmission ; 0 = Selects 8-bit transmission ; TXSTA(5) TXEN: Transmit Enable bit(1) ; 1 = Transmit enabled ; 0 = Transmit disabled ; TXSTA(4) SYNC: EUSART Mode Select bit ; 1 = Synchronous mode ; 0 = Asynchronous mode ; TXSTA(3) SENDB: Send Break Character bit ; Asynchronous mode: ; 1 = Send Sync Break on next transmission (cleared by hardware upon completion) ; 0 = Sync Break transmission completed ; TXSTA(2) BRGH: High Baud Rate Select bit ; Asynchronous mode: ; 1 = High speed ; 0 = Low speed ; TXSTA(1) TRMT: Transmit Shift Register Status bit ; 1 = TSR empty ; 0 = TSR full ; TXSTA(0) TX9D: Ninth bit of Transmit Data ; Can be address/data bit or a parity bit. ; ******************************************************* SELBANK 3 ; SET BANK3 MOVLW B'00100100' MOVWF TXSTA ; ******************************************************* ; 2.Define RCSTA(RECEIVE STATUS AND CONTROL) Register ; RCSTA(7) SPEN: Serial Port Enable bit ; 1 = Serial port enabled (configures RX/DT and TX/CK pins as serial port pins) ; 0 = Serial port disabled (held in Reset) ; RCSTA(6) RX9: 9-bit Receive Enable bit ; 1 = Selects 9-bit reception ; 0 = Selects 8-bit reception ; RCSTA(5) SREN: Single Receive Enable bit ; Asynchronous mode: ; Don’t care ; RCSTA(4) CREN: Continuous Receive Enable bit ; Asynchronous mode: ; 1 = Enables receiver ; 0 = Disables receiver ; RCSTA(3) ADDEN: Address Detect Enable bit ; Asynchronous mode 9-bit (RX9 = 1): ; 1 = Enables address detection, enable interrupt and load the receive buffer when RSR<8> is set ; 0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit ; Asynchronous mode 8-bit (RX9 = 0): ; Don’t care ; RCSTA(2) FERR: Framing Error bit ; 1 = Framing error (can be updated by reading RCREG register and receive next valid byte) ; 0 = No framing error ; RCSTA(1) OERR: Overrun Error bit ; 1 = Overrun error (can be cleared by clearing bit CREN) ; 0 = No overrun error ; RCSTA(0) RX9D: Ninth bit of Received Data ; This can be address/data bit or a parity bit and must be calculated by user firmware. ; ******************************************************* MOVLW B'10010000' MOVWF RCSTA ; ******************************************************* ; 3.Define BAUDCON(BAUD RATE CONTROL) Register ; BAUDCON(7) ABDOVF: Auto-Baud Detect Overflow bit ; Asynchronous mode: ; 1 = Auto-baud timer overflowed ; 0 = Auto-baud timer did not overflow ; BAUDCON(6) RCIDL: Receive Idle Flag bit ; Asynchronous mode: ; 1 = Receiver is Idle ; 0 = Start bit has been detected and the receiver is active ; BAUDCON(5) Unimplemented: Read as ‘0’ ; BAUDCON(4) SCKP: Synchronous Clock Polarity Select bit ; Asynchronous mode: ; 1 = Transmit inverted data ; 0 = Transmit non-inverted data ; BAUDCON(3) BRG16: 16-bit Baud Rate Generator bit ; 1 = 16-bit Baud Rate Generator is used (SPBRGH:SPBRG) ; 0 = 8-bit Baud Rate Generator is used (SPBRG) ; BAUDCON(2) Unimplemented: Read as ‘0’ ; BAUDCON(1) WUE: Wake-up Enable bit ; Asynchronous mode: ; 1 = Receiver is waiting for a falling edge. No character will be received but RCIF will be set on ; the falling edge. WUE will automatically clear on the rising edge. ; 0 = Receiver is operating normally ; BAUDCON(0) ABDEN: Auto-Baud Detect Enable bit ; Asynchronous mode: ; 1 = Auto-Baud Detect mode is enabled (clears when auto-baud is complete) ; 0 = Auto-Baud Detect mode is disabled ; ******************************************************* MOVLW B'00001000' MOVWF BAUDCON ; ******************************************************* ; 3.Define BRG(EUSART Baud Rate Generator Register) Register ; ******************************************************* ; BRG = 16000000(Hz)/4/9600(BPS)-1 ==> 0d0416 ==> 0x1A0 ; (1)Define SPBRGH(EUSART Baud Rate Generator Register, High Byte) Register MOVLW H'01' MOVWF SPBRGH ; (2)Define SPBRG(EUSART Baud Rate Generator Register, Low Byte) Register MOVLW H'A0' MOVWF SPBRG ; SELBANK 0 ; SET BANK0 RETURN ;****************************************************************************************** ; Program : RECUART ; Title : ; Input : ; Output : W-reg ;****************************************************************************************** RECUART ; **************************** ; 1.Check Recvive Flag ; **************************** SELBANK 0 ; SET BANK0 BCF PIR1,RCIF ; BTFSS PIR1,RCIF GOTO $-1 ; **************************** ; 2.Check error ; **************************** SELBANK 3 ; SET BANK3 BTFSS RCSTA,FERR GOTO RECUART_2 ; SELBANK 0 ; SET BANK0 MOVLW H'00' RETURN RECUART_2 BTFSS RCSTA,OERR GOTO RECUART_3 ; SELBANK 0 ; SET BANK0 MOVLW H'00' RETURN RECUART_3 ; **************************** ; 3.Set Recive Data ; **************************** MOVF RCREG,W MOVWF TMP_C SELBANK 0 ; SET BANK0 MOVFW TMP_C RETURN ;****************************************************************************************** ; Program : SNDUART ; Title : ; Input : W-reg ; Output : ;****************************************************************************************** SNDUART MOVWF TMP_C ; *************************** ; 1.Check Send Flag ; *************************** SELBANK 3 ; SET BANK3 BTFSS TXSTA,TRMT GOTO $-1 ; *************************** ; 2.Set data ; *************************** MOVF TMP_C,W MOVWF TXREG SELBANK 0 ; SET BANK0 RETURN ;****************************************************************************************** ; Program : INTADC ; Title : ; Input : ; Output : ;****************************************************************************************** INTADC ; ******************************************************* ; 1.Define ADCON0(A/D CONTROL REGISTER 0) Register ; ADCON0(7) Unimplemented: Read as ‘0’ ; ADCON0(6-2) CHS<4:0>: Analog Channel Select bits ; 00000 = AN0 ; 00001 = AN1 ; 00010 = AN2 ; 00011 = AN3 ; 00100 = AN4(1) ※PIC16F/LF1823 only. For PIC12F/LF1822 it is “Reserved. No channel connected” ; 00101 = AN5(1) ※PIC16F/LF1823 only. For PIC12F/LF1822 it is “Reserved. No channel connected” ; 00110 = AN6(1) ※PIC16F/LF1823 only. For PIC12F/LF1822 it is “Reserved. No channel connected” ; 00111 = AN7(1) ※PIC16F/LF1823 only. For PIC12F/LF1822 it is “Reserved. No channel connected” ; 10001 = Reserved ; ・ ; ・ ; ・ ; 11101 = Reserved ; 11110 = DAC ; 11111 = FVR ; ADCON0(1) GO/DONE: A/D Conversion Status bit ; 1 = A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle. ; This bit is automatically cleared by hardware when the A/D conversion has completed. ; 0 = A/D conversion completed/not in progress ; ADCON0(0) ADON: ADC Enable bit ; 1 = ADC is enabled ; 0 = ADC is disabled and consumes no operating current ; ******************************************************* SELBANK 1 ; SET BANK1 MOVLW B'00000001' MOVWF ADCON0 ; ******************************************************* ; 2.Define ADCON1(A/D CONTROL REGISTER 1) Register ; ADCON1(7) ADFM: A/D Result Format Select bit ; 1 = Right justified. Six Most Significant bits of ADRESH are set to ‘0’ when the conversion result is loaded. ; 0 = Left justified. Six Least Significant bits of ADRESL are set to ‘0’ when the conversion result is loaded. ; ADCON1(6-4) ADCS<2:0>: A/D Conversion Clock Select bits ; 000 = FOSC/2 ; 001 = FOSC/8 ; 010 = FOSC/32 ; 011 = FRC (clock supplied from a dedicated RC oscillator) ; 100 = FOSC/4 ; 101 = FOSC/16 ; 110 = FOSC/64 ; 111 = FRC (clock supplied from a dedicated RC oscillator) ; ADCON1(3-2) Unimplemented: Read as ‘0’ ; ADCON1(1-0) ADPREF<1:0>: A/D Positive Voltage Reference Configuration bits ; 00 = VREF+ is connected to AVDD ; 01 = Reserved ; 10 = VREF+ is connected to external VREF+ ; 11 = VREF+ is connected to internal fixed voltage reference ; ******************************************************* SELBANK 1 ; SET BANK1 MOVLW B'11100000' MOVWF ADCON1 SELBANK 0 ; SET BANK0 RETURN ;****************************************************************************************** ; Function Name : GETADC ; Title : ; Input : ; Output : ADDAT_H,ADDAT_L ;****************************************************************************************** GETADC: ; ***************** ; 1.Start A/D Converter ; ***************** ; (1)GO/DONE: A/D Conversion Status bit SELBANK 1 ; SET BANK1 BSF ADCON0,GO_NOT_DONE ; ***************** ; 2.Get data ; ***************** ; (1)ADCの開始フラグが完了するまで待つ SELBANK 1 ; SET BANK1 BTFSC ADCON0,GO_NOT_DONE GOTO $-1 ; (2)結果を代入 SELBANK 1 ; SET BANK1 MOVF ADRESH,W MOVWF ADDAT_H MOVF ADRESL,W MOVWF ADDAT_L SELBANK 0 ; SET BANK0 RETURN END