;****************************************************************************************** ; PIC12F1822 Sample Program ; Project : ; Program Name : ; Programer : ; Create date : Version 1.0 H23.06.09 ; History : ; Laungage : MPLAB MPASM ;****************************************************************************************** ; (1)Description ; OSC : Internal OSC 16MHz ;****************************************************************************************** LIST P=PIC12F1822,ST=OFF,R=DEC INCLUDE "P12F1822.inc" __CONFIG _CONFIG1 , _FOSC_INTOSC & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF __CONFIG _CONFIG2 , _WRT_OFF & _PLLEN_OFF & _STVREN_OFF & _BORV_25 & _LVP_OFF ; ; Define GENERAL PURPOSE RAM AREA (80 bytes maximum) ; TMP_G EQU 20H ; ; Define Common RAM AREA (16 bytes) ; TMP_C EQU 70H ; Define Macro SELBANK MACRO #BANK_NO MOVLW #BANK_NO MOVWF BSR ENDM OUTPWM MACRO #DUT_NO MOVLW #DUT_NO MOVWF TMP_C SELBANK 5 MOVFW TMP_C MOVWF CCPR1L SELBANK 0 ENDM DELAY MACRO #DLY_NO MOVLW #DLY_NO MOVWF TMP_C SELBANK 5 MOVFW TMP_C MOVWF PWM1CON SELBANK 0 ENDM TIM1S MACRO CALL TIMER CALL TIMER CALL TIMER CALL TIMER CALL TIMER CALL TIMER CALL TIMER CALL TIMER CALL TIMER CALL TIMER ENDM ORG 0h GOTO START ORG 4h GOTO START START ; ***************************** ; 1.Initialized Segment ; ***************************** ; (1)Define OSC (16MHz, IntOSC) SELBANK 1 ; SET BANK1 MOVLW B'11111010' MOVWF OSCCON ; (2)Define I/O port SELBANK 1 ; SET BANK1 MOVLW B'00111010' MOVWF TRISA ; (3)Initialized PWM CALL INITPWM SELBANK 0 ; SET BANK0 ; ***************************** ; 2.Program main ; ***************************** ; (1)Main loop MAIN ; 1)ACTIVE-HIGH STATE ; Duty Cycle==>25, Delay==>10 OUTPWM 0x3F DELAY 0x10 TIM1S TIM1S ; 2)ACTIVE-HIGH STATE ; Duty Cycle==>50, Delay==>10 OUTPWM 0x7F DELAY 0x10 TIM1S TIM1S ; 3)ACTIVE-HIGH STATE ; Duty Cycle==>75, Delay==>10 OUTPWM 0xBD DELAY 0x10 TIM1S TIM1S GOTO MAIN ;****************************************************************************************** ; Program : INITPWM ; Title : ; Input : ; Output : ;****************************************************************************************** INITPWM ; ******************************************************* ; 1.ALTERNATE PIN FUNCTION CONTROL REGISTER ; CCP1SEL ; For 8 Pin Devices (PIC12F/LF1822): ; 0 = CCP1/P1A function is on RA2 ; 1 = CCP1/P1A function is on RA5 ; P1BSEL ; For 8 Pin Devices (PIC12F/LF1822): ; 0 = P1B function is on RA0 ; 1 = P1B function is on RA4 ; ******************************************************* SELBANK 2 ; SET BANK2 BCF APFCON,CCP1SEL BCF APFCON,P1BSEL ; ******************************************************* ; 2.Define CCP1CON: CCP1 CONTROL REGISTER ; CCP1CON[7-6] P1M<1:0>: Enhanced PWM Output Configuration bits(1) ; Capture mode: Unused ; Compare mode: Unused ; PWM mode: ; If CCP1M<3:2> = 00, 01, 10: ; xx = P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins ŠPIC16F/LF1823 only ; If CCP1M<3:2> = 11: ; 00 = Single output; P1A modulated; P1B, P1C, P1D assigned as port pins ; 01 = Full-Bridge output forward; P1D modulated; P1A active; P1B, P1C inactive ŠPIC16F/LF1823 only ; 10 = Half-Bridge output; P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins ; 11 = Full-Bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive ŠPIC16F/LF1823 only ; CCP1CON[5-4] DC1B<1:0>: PWM Duty Cycle Least Significant bits ; Capture mode: Unused ; Compare mode: Unused ; PWM mode: ; These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L. ; CCP1CON[3-0] CCP1M<3:0>: ECCP1 Mode Select bits ; 0000 = Capture/Compare/PWM off (resets ECCP1 module) ; 0001 = Reserved ; 0010 = Compare mode: toggle output on match ; 0011 = Reserved ; 0100 = Capture mode: every falling edge ; 0101 = Capture mode: every rising edge ; 0110 = Capture mode: every 4th rising edge ; 0111 = Capture mode: every 16th rising edge ; 1000 = Compare mode: initialize ECCP1 pin low; set output on compare match (set CCP1IF) ; 1001 = Compare mode: initialize ECCP1 pin high; clear output on compare match (set CCP1IF) ; 1010 = Compare mode: generate software interrupt only; ECCP1 pin reverts to I/O state ; 1011 = Compare mode: Special Event Trigger (CCP1 resets TMR1, sets CCP1IF bit, and starts A/D conversion if A/D module is enabled) ; PWM mode: ; 1100 = PWM mode: P1A, P1C active-high; P1B, P1D active-high ; 1101 = PWM mode: P1A, P1C active-high; P1B, P1D active-low ; 1110 = PWM mode: P1A, P1C active-low; P1B, P1D active-high ; 1111 = PWM mode: P1A, P1C active-low; P1B, P1D active-low ; ******************************************************* SELBANK 5 ; SET BANK5 MOVLW B'10001100' MOVWF CCP1CON ; ******************************************************* ; 3.T2CON: TIMER2 CONTROL REGISTER ; T2CON[7] Unimplemented: Read as e0f ; T2CON[6-3] TOUTPS<3:0>: Timer Output Postscaler Select bits ; 0000 = 1:1 Postscaler ; 0001 = 1:2 Postscaler ; 0010 = 1:3 Postscaler ; 0011 = 1:4 Postscaler ; 0100 = 1:5 Postscaler ; 0101 = 1:6 Postscaler ; 0110 = 1:7 Postscaler ; 0111 = 1:8 Postscaler ; 1000 = 1:9 Postscaler ; 1001 = 1:10 Postscaler ; 1010 = 1:11 Postscaler ; 1011 = 1:12 Postscaler ; 1100 = 1:13 Postscaler ; 1101 = 1:14 Postscaler ; 1110 = 1:15 Postscaler ; 1111 = 1:16 Postscaler ; T2CON[2] TMR2ON: Timer2 On bit ; 1 = Timer2 is on ; 0 = Timer2 is off ; T2CON[1-0] T2CKPS<1:0>: Timer2 Clock Prescale Select bits ; 00 = Prescaler is 1 ; 01 = Prescaler is 4 ; 10 = Prescaler is 16 ; 11 = Prescaler is 64 ; ******************************************************* SELBANK 0 ; SET BANK0 MOVLW B'00000100' MOVWF T2CON ; ******************************************************* ; 4.PSTR1CON: PWM STEERING CONTROL REGISTER ; PSTR1CON[7-5] Unimplemented: Read as e0f ; PSTR1CON[4] STR1SYNC: Steering Sync bit ; 1 = Output steering update occurs on next PWM period ; 0 = Output steering update occurs at the beginning of the instruction cycle boundary ; PSTR1CON[3] STR1D: Steering Enable bit D(2) ; 1 = P1D pin has the PWM waveform with polarity control from CCP1M<1:0> ; 0 = P1D pin is assigned to port pin ; PSTR1CON[2] STR1C: Steering Enable bit C(2) ; 1 = P1C pin has the PWM waveform with polarity control from CCP1M<1:0> ; 0 = P1C pin is assigned to port pin ; PSTR1CON[1] STR1B: Steering Enable bit B ; 1 = P1B pin has the PWM waveform with polarity control from CCP1M<1:0> ; 0 = P1B pin is assigned to port pin ; PSTR1CON[0] STR1A: Steering Enable bit A ; 1 = P1A pin has the PWM waveform with polarity control from CCP1M<1:0> ; 0 = P1A pin is assigned to port pin ; ******************************************************* SELBANK 5 ; SET BANK5 MOVLW B'00010011' MOVWF PSTR1CON ; ******************************************************* ; 5.PWM1CON: ENHANCED PWM CONTROL REGISTER ; PWM1CON[7] P1RSEN: PWM Restart Enable bit ; 1 = Upon auto-shutdown, the CCP1ASE bit clears automatically once the shutdown event goes ; away; the PWM restarts automatically ; 0 = Upon auto-shutdown, CCP1ASE must be cleared in software to restart the PWM ; PWM1CON[6-0] P1DC<6:0>: PWM Delay Count bits ; P1DC1 = Number of FOSC/4 (4 * TOSC) cycles between the scheduled time when a PWM signal ; should transition active and the actual time it transitions active ; ******************************************************* SELBANK 5 ; SET BANK5 MOVLW B'00000000' MOVWF PWM1CON ; ******************************************************* ; 4.Set PR2 Register ; PWM Frequency ; ******************************************************* SELBANK 0 ; SET BANK0 MOVLW H'FF' MOVWF PR2 ; ******************************************************* ; 5.Default Value ; ******************************************************* SELBANK 5 ; SET BANK5 MOVLW H'00' MOVWF CCPR1L SELBANK 0 ; SET BANK0 RETURN ;****************************************************************************************** ; Function Name : TIMER ; Title : Timer (100mS) ; Input : ; Output : ;****************************************************************************************** TIMER ; ******************************************************* ; 1.Define T1CON(TIMER1 CONTROL REGISTER) Register ; T1CON(7-6) TMR1CS1,TMR1CS0: Timer1 Clock Source Select bits ; 11 =Timer1 clock source is Capacitive Sensing Oscillator (CAPOSC) ; 10 =Timer1 clock source is pin or oscillator: ; If T1OSCEN = 0: ; External clock from T1CKI pin (on the rising edge) ; If T1OSCEN = 1: ; Crystal oscillator on T1OSI/T1OSO pins ; 01 =Timer1 clock source is system clock (FOSC) ; 00 =Timer1 clock source is instruction clock (FOSC/4) ; T1CON(5-4) T1CKPS1,T1CKPS0: Timer1 Input Clock Prescale Select bits ; 11 = 1:8 Prescale value ; 10 = 1:4 Prescale value ; 01 = 1:2 Prescale value ; 00 = 1:1 Prescale value ; T1CON(3) T1OSCEN: LP Oscillator Enable Control bit ; 1 = Dedicated Timer1 oscillator circuit enabled ; 0 = Dedicated Timer1 oscillator circuit disabled ; T1CON(2) T1SYNC: Timer1 External Clock Input Synchronization Control bit ; TMR1CS1,TMR1CS0 = 1X ; 1 = Do not synchronize external clock input ; 0 = Synchronize external clock input with system clock (FOSC) ; TMR1CS1,TMR1CS0 = 0X ; This bit is ignored. Timer1 uses the internal clock when TMR1CS<1:0> = 1X. ; T1CON(1) Unimplemented: Read as e0f ; T1CON(0) TMR1ON: Timer1 On bit ; 1 = Enables Timer1 ; 0 = Stops Timer1 ; Clears Timer1 Gate flip-flop ; ******************************************************* SELBANK 0 ; SET BANK0 MOVLW B'00110001' MOVWF T1CON ; ******************************************************* ; 2.Define T1GCON (TIMER1 GATE CONTROL REGISTER) Register ; T1GCON(7) TMR1GE: Timer1 Gate Enable bit ; If TMR1ON = 0: ; This bit is ignored ; If TMR1ON = 1: ; 1 = Timer1 counting is controlled by the Timer1 gate function ; 0 = Timer1 counts regardless of Timer1 gate function ; T1GCON(6) T1GPOL: Timer1 Gate Polarity bit ; 1 = Timer1 gate is active-high (Timer1 counts when gate is high) ; 0 = Timer1 gate is active-low (Timer1 counts when gate is low) ; T1GCON(5) T1GTM: Timer1 Gate Toggle Mode bit ; 1 = Timer1 Gate Toggle mode is enabled ; 0 = Timer1 Gate Toggle mode is disabled and toggle flip-flop is cleared ; Timer1 gate flip-flop toggles on every rising edge. ; T1GCON(4) T1GSPM: Timer1 Gate Single-Pulse Mode bit ; 1 = Timer1 gate Single-Pulse mode is enabled and is controlling Timer1 gate ; 0 = Timer1 gate Single-Pulse mode is disabled ; T1GCON(3) T1GGO/DONE: Timer1 Gate Single-Pulse Acquisition Status bit ; 1 = Timer1 gate single-pulse acquisition is ready, waiting for an edge ; 0 = Timer1 gate single-pulse acquisition has completed or has not been started ; This bit is automatically cleared when T1GSPM is cleared. ; T1GCON(2) T1GVAL: Timer1 Gate Current State bit ; Indicates the current state of the Timer1 gate that could be provided to TMR1H:TMR1L. ; Unaffected by Timer1 Gate Enable (TMR1GE). ; T1GCON(1-0) T1GSS1,T1GSS0: Timer1 Gate Source Select bits ; 00 = Timer1 Gate pin ; 01 = Timer0 overflow output ; 10 = Comparator 1 optionally synchronized output (SYNCC1OUT) ; 11 = Comparator 2 optionally synchronized output (SYNCC2OUT) ; ******************************************************* MOVLW B'00000000' MOVWF T1GCON ; ******************************************************* ; 3.Define TMR1 Register ; ******************************************************* ; TMR1 data ( OSC:16MHz, FOSC/4, 1:8 Prescale value, 0.01[S];100Hz ) ; 10mS(100Hz): 16MHz / 4(FOSC/4) / 8(Prescale) / 100(100Hz)==> 0d5,000(Count) ==> 0x1388(Count) ; TMR1 = 0xFFFF - 0x1388 ==> 0xEC77 ; TMR1 data ( OSC:16MHz, FOSC/4, 1:8 Prescale value, 0.1[S];10Hz ) ; 100mS(10Hz): 16MHz / 4(FOSC/4) / 8(Prescale) / 10(10Hz) ==> 0d50,000(Count) ==> 0xC350(Count) ; TMR1 = 0xFFFF - 0xC350 ==> 0x3CAF MOVLW H'3C' MOVWF TMR1H MOVLW H'AF' MOVWF TMR1L ; ******************************************************* ; 4.Timer ; ******************************************************* BCF PIR1,TMR1IF BTFSS PIR1,TMR1IF GOTO $-1 RETURN END