/***********************************************************************/ /* */ /* FILE :TEST0009_R8C27.c */ /* DATE :Sun, Jan 02, 2011 */ /* DESCRIPTION :Main Program */ /* CPU GROUP :Other */ /* */ /* This file is generated by Renesas Project Generator (Ver.4.18). */ /* NOTE:THIS IS A TYPICAL EXAMPLE. */ /***********************************************************************/ //************************************************* // Define Address(Ｒ８Ｃ／２７マイコン用) //************************************************* #pragma ADDRESS p0_addr 00E0h #pragma ADDRESS pd0_addr 00E2h #pragma ADDRESS p1_addr 00E1h #pragma ADDRESS pd1_addr 00E3H #pragma ADDRESS p3_addr 00E5H #pragma ADDRESS pd3_addr 00E7H #pragma ADDRESS p4_addr 00E8H #pragma ADDRESS pd4_addr 00EAH #pragma ADDRESS p5_addr 00E9H #pragma ADDRESS pd5_addr 00EBH // #pragma ADDRESS OCD_addr 000CH #pragma ADDRESS PRCR_addr 000AH #pragma ADDRESS CM0_addr 0006H #pragma ADDRESS CM1_addr 0007H //************************************************* // Define Structure //************************************************* struct bit_def { char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; }; union byte_def{ struct bit_def bit; char byte; }; //************************************************* // Define Port register and Port direction register //************************************************* union byte_def p0_addr; #define p0 p0_addr.byte #define p0_0 p0_addr.bit.b0 #define p0_1 p0_addr.bit.b1 #define p0_2 p0_addr.bit.b2 #define p0_3 p0_addr.bit.b3 #define p0_4 p0_addr.bit.b4 #define p0_5 p0_addr.bit.b5 #define p0_6 p0_addr.bit.b6 #define p0_7 p0_addr.bit.b7 // union byte_def pd0_addr; #define pd0 pd0_addr.byte #define pd0_0 pd0_addr.bit.b0 #define pd0_1 pd0_addr.bit.b1 #define pd0_2 pd0_addr.bit.b2 #define pd0_3 pd0_addr.bit.b3 #define pd0_4 pd0_addr.bit.b4 #define pd0_5 pd0_addr.bit.b5 #define pd0_6 pd0_addr.bit.b6 #define pd0_7 pd0_addr.bit.b7 // union byte_def p1_addr; #define p1 p1_addr.byte #define p1_0 p1_addr.bit.b0 #define p1_1 p1_addr.bit.b1 #define p1_2 p1_addr.bit.b2 #define p1_3 p1_addr.bit.b3 #define p1_4 p1_addr.bit.b4 #define p1_5 p1_addr.bit.b5 #define p1_6 p1_addr.bit.b6 #define p1_7 p1_addr.bit.b7 // union byte_def pd1_addr; #define pd1 pd1_addr.byte #define pd1_0 pd1_addr.bit.b0 #define pd1_1 pd1_addr.bit.b1 #define pd1_2 pd1_addr.bit.b2 #define pd1_3 pd1_addr.bit.b3 #define pd1_4 pd1_addr.bit.b4 #define pd1_5 pd1_addr.bit.b5 #define pd1_6 pd1_addr.bit.b6 #define pd1_7 pd1_addr.bit.b7 // union byte_def p3_addr; #define p3 p3_addr.byte #define p3_0 p3_addr.bit.b0 #define p3_1 p3_addr.bit.b1 #define p3_2 p3_addr.bit.b2 #define p3_3 p3_addr.bit.b3 #define p3_4 p3_addr.bit.b4 #define p3_5 p3_addr.bit.b5 #define p3_6 p3_addr.bit.b6 #define p3_7 p3_addr.bit.b7 // union byte_def pd3_addr; #define pd3 pd3_addr.byte #define pd3_0 pd3_addr.bit.b0 #define pd3_1 pd3_addr.bit.b1 #define pd3_2 pd3_addr.bit.b2 #define pd3_3 pd3_addr.bit.b3 #define pd3_4 pd3_addr.bit.b4 #define pd3_5 pd3_addr.bit.b5 #define pd3_6 pd3_addr.bit.b6 #define pd3_7 pd3_addr.bit.b7 // union byte_def p4_addr; #define p4 p4_addr.byte #define p4_0 p4_addr.bit.b0 #define p4_1 p4_addr.bit.b1 #define p4_2 p4_addr.bit.b2 #define p4_3 p4_addr.bit.b3 #define p4_4 p4_addr.bit.b4 #define p4_5 p4_addr.bit.b5 #define p4_6 p4_addr.bit.b6 #define p4_7 p4_addr.bit.b7 // union byte_def pd4_addr; #define pd4 pd4_addr.byte #define pd4_0 pd4_addr.bit.b0 #define pd4_1 pd4_addr.bit.b1 #define pd4_2 pd4_addr.bit.b2 #define pd4_3 pd4_addr.bit.b3 #define pd4_4 pd4_addr.bit.b4 #define pd4_5 pd4_addr.bit.b5 #define pd4_6 pd4_addr.bit.b6 #define pd4_7 pd4_addr.bit.b7 // union byte_def p5_addr; #define p5 p5_addr.byte #define p5_0 p5_addr.bit.b0 #define p5_1 p5_addr.bit.b1 #define p5_2 p5_addr.bit.b2 #define p5_3 p5_addr.bit.b3 #define p5_4 p5_addr.bit.b4 #define p5_5 p5_addr.bit.b5 #define p5_6 p5_addr.bit.b6 #define p5_7 p5_addr.bit.b7 // union byte_def pd5_addr; #define pd5 pd5_addr.byte #define pd5_0 pd5_addr.bit.b0 #define pd5_1 pd5_addr.bit.b1 #define pd5_2 pd5_addr.bit.b2 #define pd5_3 pd5_addr.bit.b3 #define pd5_4 pd5_addr.bit.b4 #define pd5_5 pd5_addr.bit.b5 #define pd5_6 pd5_addr.bit.b6 #define pd5_7 pd5_addr.bit.b7 //************************************************* // Define OSC register //************************************************* union byte_def OCD_addr; #define OCD OCD_addr.byte #define OCD0 OCD_addr.bit.b0 #define OCD1 OCD_addr.bit.b1 #define OCD2 OCD_addr.bit.b2 #define OCD3 OCD_addr.bit.b3 #define OCD_4 OCD_addr.bit.b4 #define OCD_5 OCD_addr.bit.b5 #define OCD_6 OCD_addr.bit.b6 #define OCD_7 OCD_addr.bit.b7 //************************************************* // Define Protect register //************************************************* union byte_def PRCR_addr; #define PRCR PRCR_addr.byte #define PRC0 PRCR_addr.bit.b0 #define PRC1 PRCR_addr.bit.b1 #define PRC2 PRCR_addr.bit.b2 #define PRC3 PRCR_addr.bit.b3 #define PRCR_4 PRCR_addr.bit.b4 #define PRCR_5 PRCR_addr.bit.b5 #define PRCR_6 PRCR_addr.bit.b6 #define PRCR_7 PRCR_addr.bit.b7 //************************************************* // Define CM register //************************************************* union byte_def CM0_addr; #define CM0 CM0_addr.byte #define CM0_0 CM0_addr.bit.b0 #define CM01 CM0_addr.bit.b1 #define CM02 CM0_addr.bit.b2 #define CM03 CM0_addr.bit.b3 #define CM04 CM0_addr.bit.b4 #define CM05 CM0_addr.bit.b5 #define CM06 CM0_addr.bit.b6 #define CM0_7 CM0_addr.bit.b7 // union byte_def CM1_addr; #define CM1 CM1_addr.byte #define CM10 CM1_addr.bit.b0 #define CM11 CM1_addr.bit.b1 #define CM12 CM1_addr.bit.b2 #define CM13 CM1_addr.bit.b3 #define CM14 CM1_addr.bit.b4 #define CM15 CM1_addr.bit.b5 #define CM16 CM1_addr.bit.b6 #define CM17 CM1_addr.bit.b7 // //************************************************* // Define Function //************************************************* void wat(void); void main(void) { unsigned int LEDlst = 0; unsigned int lp; // ******************************* // 1.Initialized segment // ******************************* // (1)Select Osc (Select 20MHz External OSC) asm("FCLR I"); PRC0 = 1; //Write enable CM0、CM1、OCD、FRA0、FRA1、FRA2 CM01 = 0; //Start External OSC CM13 = 1; //Start External OSC CM05 = 0; //Start External OSC for(lp=0;lp<100;lp++){ asm("NOP"); } OCD2 = 0; //Select External OSC PRC0 = 0; //Write disable CM0、CM1、OCD、FRA0、FRA1、FRA2 // (2)Define I/O PORT PRC2 = 1; //pd0に書き込みを行う場合、PRC2=1(PD0レジスタへの書き込み許可)しないと書き込みできません！！！ pd0 = 0xFF; p0 = 0x00; // ******************************* // 2.Program main // ******************************* LEDlst = 1; while(1){ wat(); if(LEDlst == 1){ LEDlst = 2; }else if(LEDlst > 127){ LEDlst = 1; }else{ LEDlst = LEDlst * 2; } p0 = LEDlst; } } //****************************************************************************************** // Function Name : wat // Title : wait function // Input : // Output : // Description : //****************************************************************************************** void wat(void) { unsigned int i,i1; for( i1=0 ; i1<100 ; i1++ ){ for( i=0 ; i<100 ; i++ ){ asm("NOP"); } } }