/***********************************************************************/ /* */ /* FILE :TEST0014_R8C27.c */ /* DATE :Wed, Jan 05, 2011 */ /* DESCRIPTION :Main Program */ /* CPU GROUP :Other */ /* */ /* This file is generated by Renesas Project Generator (Ver.4.18). */ /* NOTE:THIS IS A TYPICAL EXAMPLE. */ /***********************************************************************/ //************************************************* // Define Address(Ｒ８Ｃ／２７マイコン用) //************************************************* #pragma ADDRESS p0_addr 00E0h #pragma ADDRESS pd0_addr 00E2h #pragma ADDRESS p1_addr 00E1h #pragma ADDRESS pd1_addr 00E3H #pragma ADDRESS p3_addr 00E5H #pragma ADDRESS pd3_addr 00E7H #pragma ADDRESS p4_addr 00E8H #pragma ADDRESS pd4_addr 00EAH #pragma ADDRESS p5_addr 00E9H #pragma ADDRESS pd5_addr 00EBH // #pragma ADDRESS PUR0_addr 00FCH #pragma ADDRESS PUR1_addr 00FDH // #pragma ADDRESS OCD_addr 000CH #pragma ADDRESS PRCR_addr 000AH #pragma ADDRESS CM0_addr 0006H #pragma ADDRESS CM1_addr 0007H // #pragma ADDRESS U0TB_addr 00A2h //00A2h-00A3h #pragma ADDRESS U1TB_addr 00AAh //00AAh-00ABh #pragma ADDRESS U0RB_addr 00A6h //00A6h-00A7h #pragma ADDRESS U1RB_addr 00AEh //00AEh-00AFh #pragma ADDRESS U0BRG_addr 00A1h #pragma ADDRESS U1BRG_addr 00A9h #pragma ADDRESS U0MR_addr 00A0h #pragma ADDRESS U1MR_addr 00A8h #pragma ADDRESS U0C0_addr 00A4h #pragma ADDRESS U1C0_addr 00ACh #pragma ADDRESS U0C1_addr 00A5h #pragma ADDRESS U1C1_addr 00ADh #pragma ADDRESS PINSR1_addr 00F5h #pragma ADDRESS PMR_addr 00F8h // #pragma ADDRESS ADCON0_addr 00D6h #pragma ADDRESS ADCON1_addr 00D7h #pragma ADDRESS ADCON2_addr 00D4h #pragma ADDRESS AD_addr 00C0h //00C0h-00C1h // #pragma ADDRESS TRACR_addr 0100H #pragma ADDRESS TRAIOC_addr 0101H #pragma ADDRESS TRAMR_addr 0102H #pragma ADDRESS TRAPRE_addr 0103H #pragma ADDRESS TRA_addr 0104H // #pragma ADDRESS TRAIC_addr 0056H //************************************************* // Define Structure //************************************************* struct bit_def { char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; }; union byte_def{ struct bit_def bit; char byte; }; // union{ struct{ char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; char b8:1; char b9:1; char b10:1; char b11:1; char b12:1; char b13:1; char b14:1; char b15:1; }bit; struct{ char low; /* low 8 bit */ char high; /* high 8 bit */ }byte; unsigned int word; } U0TB_addr,U1TB_addr; // union{ struct{ char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; char b8:1; char b9:1; char b10:1; char b11:1; char oer:1; /* Overrun error flag */ char fer:1; /* Framing error flag */ char per:1; /* Parity error flag */ char sum:1; /* Error sum flag */ }bit; struct{ char low; /* Low 8 bit */ char high; /* High 8 bit */ }byte; unsigned short word; }U0RB_addr,U1RB_addr; // union{ struct{ char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; char b8:1; char b9:1; char b10:1; char b11:1; char b12:1; char b13:1; char b14:1; char b15:1; }bit; struct{ char low; /* Low 8 bit */ char high; /* High 8 bit */ }byte; unsigned short word; }AD_addr; //************************************************* // Define Port register and Port direction register //************************************************* union byte_def p0_addr; #define p0 p0_addr.byte #define p0_0 p0_addr.bit.b0 #define p0_1 p0_addr.bit.b1 #define p0_2 p0_addr.bit.b2 #define p0_3 p0_addr.bit.b3 #define p0_4 p0_addr.bit.b4 #define p0_5 p0_addr.bit.b5 #define p0_6 p0_addr.bit.b6 #define p0_7 p0_addr.bit.b7 // union byte_def pd0_addr; #define pd0 pd0_addr.byte #define pd0_0 pd0_addr.bit.b0 #define pd0_1 pd0_addr.bit.b1 #define pd0_2 pd0_addr.bit.b2 #define pd0_3 pd0_addr.bit.b3 #define pd0_4 pd0_addr.bit.b4 #define pd0_5 pd0_addr.bit.b5 #define pd0_6 pd0_addr.bit.b6 #define pd0_7 pd0_addr.bit.b7 // union byte_def p1_addr; #define p1 p1_addr.byte #define p1_0 p1_addr.bit.b0 #define p1_1 p1_addr.bit.b1 #define p1_2 p1_addr.bit.b2 #define p1_3 p1_addr.bit.b3 #define p1_4 p1_addr.bit.b4 #define p1_5 p1_addr.bit.b5 #define p1_6 p1_addr.bit.b6 #define p1_7 p1_addr.bit.b7 // union byte_def pd1_addr; #define pd1 pd1_addr.byte #define pd1_0 pd1_addr.bit.b0 #define pd1_1 pd1_addr.bit.b1 #define pd1_2 pd1_addr.bit.b2 #define pd1_3 pd1_addr.bit.b3 #define pd1_4 pd1_addr.bit.b4 #define pd1_5 pd1_addr.bit.b5 #define pd1_6 pd1_addr.bit.b6 #define pd1_7 pd1_addr.bit.b7 // union byte_def p3_addr; #define p3 p3_addr.byte #define p3_0 p3_addr.bit.b0 #define p3_1 p3_addr.bit.b1 #define p3_2 p3_addr.bit.b2 #define p3_3 p3_addr.bit.b3 #define p3_4 p3_addr.bit.b4 #define p3_5 p3_addr.bit.b5 #define p3_6 p3_addr.bit.b6 #define p3_7 p3_addr.bit.b7 // union byte_def pd3_addr; #define pd3 pd3_addr.byte #define pd3_0 pd3_addr.bit.b0 #define pd3_1 pd3_addr.bit.b1 #define pd3_2 pd3_addr.bit.b2 #define pd3_3 pd3_addr.bit.b3 #define pd3_4 pd3_addr.bit.b4 #define pd3_5 pd3_addr.bit.b5 #define pd3_6 pd3_addr.bit.b6 #define pd3_7 pd3_addr.bit.b7 // union byte_def p4_addr; #define p4 p4_addr.byte #define p4_0 p4_addr.bit.b0 #define p4_1 p4_addr.bit.b1 #define p4_2 p4_addr.bit.b2 #define p4_3 p4_addr.bit.b3 #define p4_4 p4_addr.bit.b4 #define p4_5 p4_addr.bit.b5 #define p4_6 p4_addr.bit.b6 #define p4_7 p4_addr.bit.b7 // union byte_def pd4_addr; #define pd4 pd4_addr.byte #define pd4_0 pd4_addr.bit.b0 #define pd4_1 pd4_addr.bit.b1 #define pd4_2 pd4_addr.bit.b2 #define pd4_3 pd4_addr.bit.b3 #define pd4_4 pd4_addr.bit.b4 #define pd4_5 pd4_addr.bit.b5 #define pd4_6 pd4_addr.bit.b6 #define pd4_7 pd4_addr.bit.b7 // union byte_def p5_addr; #define p5 p5_addr.byte #define p5_0 p5_addr.bit.b0 #define p5_1 p5_addr.bit.b1 #define p5_2 p5_addr.bit.b2 #define p5_3 p5_addr.bit.b3 #define p5_4 p5_addr.bit.b4 #define p5_5 p5_addr.bit.b5 #define p5_6 p5_addr.bit.b6 #define p5_7 p5_addr.bit.b7 // union byte_def pd5_addr; #define pd5 pd5_addr.byte #define pd5_0 pd5_addr.bit.b0 #define pd5_1 pd5_addr.bit.b1 #define pd5_2 pd5_addr.bit.b2 #define pd5_3 pd5_addr.bit.b3 #define pd5_4 pd5_addr.bit.b4 #define pd5_5 pd5_addr.bit.b5 #define pd5_6 pd5_addr.bit.b6 #define pd5_7 pd5_addr.bit.b7 // union byte_def PUR0_addr; #define PUR0 PUR0_addr.byte #define PUR00 PUR0_addr.bit.b0 #define PUR01 PUR0_addr.bit.b1 #define PUR02 PUR0_addr.bit.b2 #define PUR03 PUR0_addr.bit.b3 #define PUR0_4 PUR0_addr.bit.b4 #define PUR0_5 PUR0_addr.bit.b5 #define PUR06 PUR0_addr.bit.b6 #define PUR07 PUR0_addr.bit.b7 // union byte_def PUR1_addr; #define PUR1 PUR1_addr.byte #define PUR1_0 PUR1_addr.bit.b0 #define PUR11 PUR1_addr.bit.b1 #define PUR12 PUR1_addr.bit.b2 #define PUR13 PUR1_addr.bit.b3 #define PUR1_4 PUR1_addr.bit.b4 #define PUR1_5 PUR1_addr.bit.b5 #define PUR1_6 PUR1_addr.bit.b6 #define PUR1_7 PUR1_addr.bit.b7 //************************************************* // Define OSC register //************************************************* union byte_def OCD_addr; #define OCD OCD_addr.byte #define OCD0 OCD_addr.bit.b0 #define OCD1 OCD_addr.bit.b1 #define OCD2 OCD_addr.bit.b2 #define OCD3 OCD_addr.bit.b3 #define OCD_4 OCD_addr.bit.b4 #define OCD_5 OCD_addr.bit.b5 #define OCD_6 OCD_addr.bit.b6 #define OCD_7 OCD_addr.bit.b7 //************************************************* // Define Protect register //************************************************* union byte_def PRCR_addr; #define PRCR PRCR_addr.byte #define PRC0 PRCR_addr.bit.b0 #define PRC1 PRCR_addr.bit.b1 #define PRC2 PRCR_addr.bit.b2 #define PRC3 PRCR_addr.bit.b3 #define PRCR_4 PRCR_addr.bit.b4 #define PRCR_5 PRCR_addr.bit.b5 #define PRCR_6 PRCR_addr.bit.b6 #define PRCR_7 PRCR_addr.bit.b7 //************************************************* // Define CM register //************************************************* union byte_def CM0_addr; #define CM0 CM0_addr.byte #define CM0_0 CM0_addr.bit.b0 #define CM01 CM0_addr.bit.b1 #define CM02 CM0_addr.bit.b2 #define CM03 CM0_addr.bit.b3 #define CM04 CM0_addr.bit.b4 #define CM05 CM0_addr.bit.b5 #define CM06 CM0_addr.bit.b6 #define CM0_7 CM0_addr.bit.b7 // union byte_def CM1_addr; #define CM1 CM1_addr.byte #define CM10 CM1_addr.bit.b0 #define CM11 CM1_addr.bit.b1 #define CM12 CM1_addr.bit.b2 #define CM13 CM1_addr.bit.b3 #define CM14 CM1_addr.bit.b4 #define CM15 CM1_addr.bit.b5 #define CM16 CM1_addr.bit.b6 #define CM17 CM1_addr.bit.b7 // //************************************************* // Define Serial Cominucation //************************************************* #define U0TB U0TB_addr.word /* UART0 transmit buffer register */ #define U0TBL U0TB_addr.byte.low /* UART0 transmit buffer register Low */ #define U0TBH U0TB_addr.byte.high /* UART0 transmit buffer register High */ // #define U1TB U1TB_addr.word /* UART1 transmit buffer register */ #define U1TBL U1TB_addr.byte.low /* UART1 transmit buffer register Low */ #define U1TBH U1TB_addr.byte.high /* UART1 transmit buffer register High */ // #define U0RB U0RB_addr.word #define U0RBL U0RB_addr.byte.low #define U0RBH U0RB_addr.byte.high #define OER_U0RB U0RB_addr.bit.oer /* Overrun error flag */ #define FER_U0RB U0RB_addr.bit.fer /* Framing error flag */ #define PER_U0RB U0RB_addr.bit.per /* Parity error flag */ #define SUM_U0RB U0RB_addr.bit.sum /* Error sum flag */ // #define U1RB U1RB_addr.word #define U1RBL U1RB_addr.byte.low #define U1RBH U1RB_addr.byte.high #define OER_U1RB U1RB_addr.bit.oer /* Overrun error flag */ #define FER_U1RB U1RB_addr.bit.fer /* Framing error flag */ #define PER_U1RB U1RB_addr.bit.per /* Parity error flag */ #define SUM_U1RB U1RB_addr.bit.sum /* Error sum flag */ // union byte_def U0BRG_addr; #define U0BRG U0BRG_addr.byte #define U0BRG_0 U0BRG_addr.bit.b0 #define U0BRG_1 U0BRG_addr.bit.b1 #define U0BRG_2 U0BRG_addr.bit.b2 #define U0BRG_3 U0BRG_addr.bit.b3 #define U0BRG_4 U0BRG_addr.bit.b4 #define U0BRG_5 U0BRG_addr.bit.b5 #define U0BRG_6 U0BRG_addr.bit.b6 #define U0BRG_7 U0BRG_addr.bit.b7 // union byte_def U1BRG_addr; #define U1BRG U1BRG_addr.byte #define U1BRG_0 U1BRG_addr.bit.b0 #define U1BRG_1 U1BRG_addr.bit.b1 #define U1BRG_2 U1BRG_addr.bit.b2 #define U1BRG_3 U1BRG_addr.bit.b3 #define U1BRG_4 U1BRG_addr.bit.b4 #define U1BRG_5 U1BRG_addr.bit.b5 #define U1BRG_6 U1BRG_addr.bit.b6 #define U1BRG_7 U1BRG_addr.bit.b7 // union byte_def U0MR_addr; #define U0MR U0MR_addr.byte #define SMD0_U0MR U0MR_addr.bit.b0 #define SMD1_U0MR U0MR_addr.bit.b1 #define SMD2_U0MR U0MR_addr.bit.b2 #define CKDIR_U0MR U0MR_addr.bit.b3 #define STPS_U0MR U0MR_addr.bit.b4 #define PRY_U0MR U0MR_addr.bit.b5 #define PRYE_U0MR U0MR_addr.bit.b6 #define U0MR_7_U0MR U0MR_addr.bit.b7 // union byte_def U1MR_addr; #define U1MR U1MR_addr.byte #define SMD0_U1MR U1MR_addr.bit.b0 #define SMD1_U1MR U1MR_addr.bit.b1 #define SMD2_U1MR U1MR_addr.bit.b2 #define CKDIR_U1MR U1MR_addr.bit.b3 #define STPS_U1MR U1MR_addr.bit.b4 #define PRY_U1MR U1MR_addr.bit.b5 #define PRYE_U1MR U1MR_addr.bit.b6 #define U0MR_7_U1MR U1MR_addr.bit.b7 // union byte_def U0C0_addr; #define U0C0 U0C0_addr.byte #define CLK0_U0C0 U0C0_addr.bit.b0 #define CLK1_U0C0 U0C0_addr.bit.b1 #define U0C0_2 U0C0_addr.bit.b2 #define TXEPT_U0C0 U0C0_addr.bit.b3 #define U0C0_4 U0C0_addr.bit.b4 #define NCH_U0C0 U0C0_addr.bit.b5 #define CKPOL_U0C0 U0C0_addr.bit.b6 #define UFORM_U0C0 U0C0_addr.bit.b7 // union byte_def U1C0_addr; #define U1C0 U1C0_addr.byte #define CLK0_U1C0 U1C0_addr.bit.b0 #define CLK1_U1C0 U1C0_addr.bit.b1 #define U1C0_2 U1C0_addr.bit.b2 #define TXEPT_U1C0 U1C0_addr.bit.b3 #define U1C0_4 U1C0_addr.bit.b4 #define NCH_U1C0 U1C0_addr.bit.b5 #define CKPOL_U1C0 U1C0_addr.bit.b6 #define UFORM_U1C0 U1C0_addr.bit.b7 // union byte_def U0C1_addr; #define U0C1 U0C1_addr.byte #define TE_U0C1 U0C1_addr.bit.b0 #define TI_U0C1 U0C1_addr.bit.b1 #define RE_U0C1 U0C1_addr.bit.b2 #define RI_U0C1 U0C1_addr.bit.b3 #define UiIRS_U0C1 U0C1_addr.bit.b4 #define UiRRM_U0C1 U0C1_addr.bit.b5 #define U0C1_6 U0C1_addr.bit.b6 #define U0C1_7 U0C1_addr.bit.b7 // union byte_def U1C1_addr; #define U1C1 U1C1_addr.byte #define TE_U1C1 U1C1_addr.bit.b0 #define TI_U1C1 U1C1_addr.bit.b1 #define RE_U1C1 U1C1_addr.bit.b2 #define RI_U1C1 U1C1_addr.bit.b3 #define UiIRS_U1C1 U1C1_addr.bit.b4 #define UiRRM_U1C1 U1C1_addr.bit.b5 #define U1C1_6 U1C1_addr.bit.b6 #define U1C1_7 U1C1_addr.bit.b7 // union byte_def PINSR1_addr; #define PINSR1 PINSR1_addr.byte #define UART1SEL0 PINSR1_addr.bit.b0 #define UART1SEL1 PINSR1_addr.bit.b1 #define PINSR1_2 PINSR1_addr.bit.b2 #define PINSR1_3 PINSR1_addr.bit.b3 #define PINSR1_4 PINSR1_addr.bit.b4 #define PINSR1_5 PINSR1_addr.bit.b5 #define PINSR1_6 PINSR1_addr.bit.b6 #define PINSR1_7 PINSR1_addr.bit.b7 // union byte_def PMR_addr; #define PMR PMR_addr.byte #define INT1SEL PMR_addr.bit.b0 #define PMR_1 PMR_addr.bit.b1 #define PMR_2 PMR_addr.bit.b2 #define SSISEL PMR_addr.bit.b3 #define U1PINSEL PMR_addr.bit.b4 #define TXD1SEL PMR_addr.bit.b5 #define TXD1EN PMR_addr.bit.b6 #define IICSEL PMR_addr.bit.b7 //************************************************* // Define A/D Converter //************************************************* union byte_def ADCON0_addr; #define ADCON0 ADCON0_addr.byte #define CH0 ADCON0_addr.bit.b0 #define CH1 ADCON0_addr.bit.b1 #define CH2 ADCON0_addr.bit.b2 #define MD ADCON0_addr.bit.b3 #define ADGSEL0 ADCON0_addr.bit.b4 #define ADCON0_5 ADCON0_addr.bit.b5 #define ADST ADCON0_addr.bit.b6 #define CKS0 ADCON0_addr.bit.b7 // union byte_def ADCON1_addr; #define ADCON1 ADCON1_addr.byte #define ADCON1_0 ADCON1_addr.bit.b0 #define ADCON1_1 ADCON1_addr.bit.b1 #define ADCON1_2 ADCON1_addr.bit.b2 #define BITS ADCON1_addr.bit.b3 #define CKS1 ADCON1_addr.bit.b4 #define VCUT ADCON1_addr.bit.b5 #define ADCON1_6 ADCON1_addr.bit.b6 #define ADCON1_7 ADCON1_addr.bit.b7 // union byte_def ADCON2_addr; #define ADCON2 ADCON2_addr.byte #define SMP ADCON2_addr.bit.b0 #define ADCON2_1 ADCON2_addr.bit.b1 #define ADCON2_2 ADCON2_addr.bit.b2 #define ADCON2_3 ADCON2_addr.bit.b3 #define ADCON2_4 ADCON2_addr.bit.b4 #define ADCON2_5 ADCON2_addr.bit.b5 #define ADCON2_6 ADCON2_addr.bit.b6 #define ADCON2_7 ADCON2_addr.bit.b7 // #define AD AD_addr.word #define ADL AD_addr.byte.low #define ADH AD_addr.byte.high //************************************************* // Define Timer RA //************************************************* union byte_def TRACR_addr; #define TRACR TRACR_addr.byte #define TSTART TRACR_addr.bit.b0 #define TCSTF TRACR_addr.bit.b1 #define TSTOP TRACR_addr.bit.b2 #define TRACR_3 TRACR_addr.bit.b3 #define TEDGF TRACR_addr.bit.b4 #define TUNDF TRACR_addr.bit.b5 #define TRACR_6 TRACR_addr.bit.b6 #define TRACR_7 TRACR_addr.bit.b7 // union byte_def TRAIOC_addr; #define TRAIOC TRAIOC_addr.byte #define TEDGSEL TRAIOC_addr.bit.b0 #define TOPCR TRAIOC_addr.bit.b1 #define TOENA TRAIOC_addr.bit.b2 #define TIOSEL TRAIOC_addr.bit.b3 #define TIPF0 TRAIOC_addr.bit.b4 #define TIPF1 TRAIOC_addr.bit.b5 #define TRAIOC_6 TRAIOC_addr.bit.b6 #define TRAIOC_7 TRAIOC_addr.bit.b7 // union byte_def TRAMR_addr; #define TRAMR TRAMR_addr.byte #define TMOD0 TRAMR_addr.bit.b0 #define TMOD1 TRAMR_addr.bit.b1 #define TMOD2 TRAMR_addr.bit.b2 #define TRAMR_3 TRAMR_addr.bit.b3 #define TCK0 TRAMR_addr.bit.b4 #define TCK1 TRAMR_addr.bit.b5 #define TCK2 TRAMR_addr.bit.b6 #define TCKCUT TRAMR_addr.bit.b7 // union byte_def TRAPRE_addr; #define TRAPRE TRAPRE_addr.byte #define TRAPRE_0 TRAPRE_addr.bit.b0 #define TRAPRE_1 TRAPRE_addr.bit.b1 #define TRAPRE_2 TRAPRE_addr.bit.b2 #define TRAPRE_3 TRAPRE_addr.bit.b3 #define TRAPRE_4 TRAPRE_addr.bit.b4 #define TRAPRE_5 TRAPRE_addr.bit.b5 #define TRAPRE_6 TRAPRE_addr.bit.b6 #define TRAPRE_7 TRAPRE_addr.bit.b7 // union byte_def TRA_addr; #define TRA TRA_addr.byte #define TRA_0 TRA_addr.bit.b0 #define TRA_1 TRA_addr.bit.b1 #define TRA_2 TRA_addr.bit.b2 #define TRA_3 TRA_addr.bit.b3 #define TRA_4 TRA_addr.bit.b4 #define TRA_5 TRA_addr.bit.b5 #define TRA_6 TRA_addr.bit.b6 #define TRA_7 TRA_addr.bit.b7 // union byte_def TRAIC_addr; #define TRAIC TRAIC_addr.byte #define ILVL0_TRAIC TRAIC_addr.bit.b0 #define ILVL1_TRAIC TRAIC_addr.bit.b1 #define ILVL2_TRAIC TRAIC_addr.bit.b2 #define IR_TRAIC TRAIC_addr.bit.b3 #define TRAIC_4 TRAIC_addr.bit.b4 #define TRAIC_5 TRAIC_addr.bit.b5 #define TRAIC_6 TRAIC_addr.bit.b6 #define TRAIC_7 TRAIC_addr.bit.b7 // //************************************************* // Define Function //************************************************* void Init_tima(void); #pragma interrupt Inter_tima void Inter_tima( void ); // unsigned int LEDlst=1; unsigned int G_counter=0; void main(void) { unsigned int lp; // ******************************* // 1.Initialized segment // ******************************* // (1)Select Osc (Select 20MHz External OSC) asm("FCLR I"); //Disable Intrupt(Iフラグ) PRC0 = 1; //Write enable CM0、CM1、OCD、FRA0、FRA1、FRA2 CM01 = 0; //Start External OSC CM13 = 1; //Start External OSC CM05 = 0; //Start External OSC for(lp=0;lp<100;lp++){ asm("NOP"); } OCD2 = 0; //Select External OSC PRC0 = 0; //Write disable CM0、CM1、OCD、FRA0、FRA1、FRA2 // (2)Define I/O POR PRC2 = 1; //pd0に書き込みを行う場合、PRC2=1(PD0レジスタへの書き込み許可)しないと書き込みできません！！！ pd0=0xff; //Derection p0=0x00; //Port1 Initialize // (3)Initialized Interupt Init_tima(); // ******************************* // 2.Program main // ******************************* // while(1); } //****************************************************************************************** // Function Name : Init_tima // Title : // Input : // Output : // Description : //****************************************************************************************** void Init_tima(void) { // *************************** // 1.Initialize // *************************** TSTART = 0; // 1000Hz: 20MHz / (200(0xC8)-1) / (100(0x64)-1) ==> 1000Hz TRAPRE = 0xC7; TRA = 0x63; // TEDGSEL = 0; TOPCR = 0; TOENA = 0; TIOSEL = 0; TIPF0 = 0; TIPF1 = 0; // TMOD0 = 0; //Select timer mode TMOD1 = 0; //Select Timer mode TMOD2 = 0; //Select Timer mode TCK2 = 0; //Select f1 TCK1 = 0; //Select f1 TCK0 = 0; //Select f1 TCKCUT = 0; // *************************** // 2.Initialize Intrupt // *************************** // 割り込み優先レベル選択 // ILVL2 ILVL1 ILVL0 // 0 0 0：レベル0 (割り込み禁止) // 0 0 1：レベル1 // 0 1 0：レベル2 // 0 1 1：レベル3 // 1 0 0：レベル4 // 1 0 1：レベル5 // 1 1 0：レベル6 // 1 1 1：レベル7 ILVL0_TRAIC = 1; ILVL1_TRAIC = 1; ILVL2_TRAIC = 1; //Iフラグ、IPL asm("LDIPL #2") ; //IPLを設定する(0〜7) ※注）プロセスの割り込み優先レベル > IPL なら割り込みが発生する asm("FSET I"); //enable Intrupt(Iフラグ) // *************************** // 3.Start Timer // *************************** TSTART = 1; } //****************************************************************************************** // Function Name : Inter_tima // Title : Interupt 1[mS] // Input : // Output : // Description : //****************************************************************************************** void Inter_tima(void) { // 0.Initiarize asm("FCLR I"); //Disable Intrupt(Iフラグ) // 1.Restart timera // 1000Hz: 20MHz / (200(0xC8)-1) / (100(0x64)-1) ==> 1000Hz TSTART = 0; TRAPRE = 0xC7; TRA = 0x63; asm("FSET I"); //enable Intrupt(Iフラグ) TSTART = 1; // 2.Program // if(G_counter > 1000){ // １秒毎に実行される処理 (1[S] = 1[mS]*1000) G_counter = 0; if(LEDlst == 1){ LEDlst = 2; }else if(LEDlst > 127){ LEDlst = 1; }else{ LEDlst = LEDlst * 2; } p0 = LEDlst; }else{ G_counter++; } }