/***********************************************************************/ /* */ /* FILE :TEST0023_R8CM12A.c */ /* DATE :Sat, Mar 05, 2011 */ /* DESCRIPTION :Main Program */ /* CPU GROUP :Other */ /* */ /* This file is generated by Renesas Project Generator (Ver.4.18). */ /* NOTE:THIS IS A TYPICAL EXAMPLE. */ /***********************************************************************/ //************************************************* // Define Address(Ｒ８Ｃ Ｍ１１Ａ／Ｍ１２Ａマイコン用) Ver 0.1 //************************************************* #pragma ADDRESS p1_addr 00AFH #pragma ADDRESS pd1_addr 00A9H #pragma ADDRESS p3_addr 00B1H #pragma ADDRESS pd3_addr 00ABH #pragma ADDRESS p4_addr 00B2H #pragma ADDRESS pd4_addr 00ACH // #pragma ADDRESS PRCR_addr 0013H #pragma ADDRESS OCOCR_addr 0021H #pragma ADDRESS EXCKCR_addr 0020H #pragma ADDRESS CSKCR_addr 0022H #pragma ADDRESS CKSTPR_addr 0024H // #pragma ADDRESS U0MR_addr 0080H #pragma ADDRESS U0BRG_addr 0081H #pragma ADDRESS U0TB_addr 0082H //0082H - 0083H #pragma ADDRESS U0C0_addr 0084H #pragma ADDRESS U0C1_addr 0085H #pragma ADDRESS U0RB_addr 0086H //0086H - 0087H #pragma ADDRESS U0IR_addr 0088H // #pragma ADDRESS PML1_addr 00C8H #pragma ADDRESS PMH1_addr 00C9H #pragma ADDRESS PMH1E_addr 00D1H #pragma ADDRESS PML4_addr 00CEH #pragma ADDRESS PMH4_addr 00CFH #pragma ADDRESS PMH4E_addr 00D5H // #pragma ADDRESS AD0_addr 0098H //0098H - 0099H #pragma ADDRESS AD1_addr 009AH //009AH - 009BH #pragma ADDRESS ADMOD_addr 009CH #pragma ADDRESS ADINSEL_addr 009DH #pragma ADDRESS ADCON0_addr 009EH #pragma ADDRESS ADICSR_addr 009FH //タイマRCのレジスタ #pragma ADDRESS TRCCNT_addr 00E8h //00E8h - 00E9h #pragma ADDRESS TRCGRA_addr 00EAh //00EAh - 00EBh #pragma ADDRESS TRCGRB_addr 00ECh //00ECh - 00EDh #pragma ADDRESS TRCGRC_addr 00EEh //00EEh - 00EFh #pragma ADDRESS TRCGRD_addr 00F0h //00F0h - 00F1h #pragma ADDRESS TRCMR_addr 00F2h #pragma ADDRESS TRCCR1_addr 00F3h #pragma ADDRESS TRCIER_addr 00F4h #pragma ADDRESS TRCSR_addr 00F5h #pragma ADDRESS TRCIOR0_addr 00F6h #pragma ADDRESS TRCIOR1_addr 00F7h #pragma ADDRESS TRCCR2_addr 00F8h #pragma ADDRESS TRCDF_addr 00F9h #pragma ADDRESS TRCOER_addr 00FAh #pragma ADDRESS TRCADCR_addr 00FBh #pragma ADDRESS TRCOPR_addr 00FCh //タイマRJ2のレジスタ #pragma ADDRESS TRJ_addr 00D8h //00D8h - 00D9h #pragma ADDRESS TRJCR_addr 00DAh #pragma ADDRESS TRJIOC_addr 00DBh #pragma ADDRESS TRJMR_addr 00DCh #pragma ADDRESS TRJISR_addr 00DDh #pragma ADDRESS TRJIR_addr 00DEh //************************************************* // Define Structure //************************************************* struct bit_def { char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; }; union byte_def{ struct bit_def bit; char byte; }; // // union{ struct{ char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; char b8:1; char b9:1; char b10:1; char b11:1; char b12:1; char b13:1; char b14:1; char b15:1; }bit; struct{ char low; /* low 8 bit */ char high; /* high 8 bit */ }byte; unsigned int word; } U0TB_addr,AD0_addr,AD1_addr,TRCCNT_addr,TRCGRA_addr,TRCGRB_addr,TRCGRC_addr,TRCGRD_addr, TRJ_addr; // union{ struct{ char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; char b8:1; char b9:1; char b10:1; char b11:1; char oer:1; /* Overrun error flag */ char fer:1; /* Framing error flag */ char per:1; /* Parity error flag */ char sum:1; /* Error sum flag */ }bit; struct{ char low; /* Low 8 bit */ char high; /* High 8 bit */ }byte; unsigned short word; }U0RB_addr; //************************************************* // Define Port register and Port direction register //************************************************* union byte_def p1_addr; #define p1 p1_addr.byte #define p1_0 p1_addr.bit.b0 #define p1_1 p1_addr.bit.b1 #define p1_2 p1_addr.bit.b2 #define p1_3 p1_addr.bit.b3 #define p1_4 p1_addr.bit.b4 #define p1_5 p1_addr.bit.b5 #define p1_6 p1_addr.bit.b6 #define p1_7 p1_addr.bit.b7 // union byte_def pd1_addr; #define pd1 pd1_addr.byte #define pd1_0 pd1_addr.bit.b0 #define pd1_1 pd1_addr.bit.b1 #define pd1_2 pd1_addr.bit.b2 #define pd1_3 pd1_addr.bit.b3 #define pd1_4 pd1_addr.bit.b4 #define pd1_5 pd1_addr.bit.b5 #define pd1_6 pd1_addr.bit.b6 #define pd1_7 pd1_addr.bit.b7 // union byte_def p3_addr; #define p3 p3_addr.byte #define p3_0 p3_addr.bit.b0 #define p3_1 p3_addr.bit.b1 #define p3_2 p3_addr.bit.b2 #define p3_3 p3_addr.bit.b3 #define p3_4 p3_addr.bit.b4 #define p3_5 p3_addr.bit.b5 #define p3_6 p3_addr.bit.b6 #define p3_7 p3_addr.bit.b7 // union byte_def pd3_addr; #define pd3 pd3_addr.byte #define pd3_0 pd3_addr.bit.b0 #define pd3_1 pd3_addr.bit.b1 #define pd3_2 pd3_addr.bit.b2 #define pd3_3 pd3_addr.bit.b3 #define pd3_4 pd3_addr.bit.b4 #define pd3_5 pd3_addr.bit.b5 #define pd3_6 pd3_addr.bit.b6 #define pd3_7 pd3_addr.bit.b7 // union byte_def p4_addr; #define p4 p4_addr.byte #define p4_0 p4_addr.bit.b0 #define p4_1 p4_addr.bit.b1 #define p4_2 p4_addr.bit.b2 #define p4_3 p4_addr.bit.b3 #define p4_4 p4_addr.bit.b4 #define p4_5 p4_addr.bit.b5 #define p4_6 p4_addr.bit.b6 #define p4_7 p4_addr.bit.b7 // union byte_def pd4_addr; #define pd4 pd4_addr.byte #define pd4_0 pd4_addr.bit.b0 #define pd4_1 pd4_addr.bit.b1 #define pd4_2 pd4_addr.bit.b2 #define pd4_3 pd4_addr.bit.b3 #define pd4_4 pd4_addr.bit.b4 #define pd4_5 pd4_addr.bit.b5 #define pd4_6 pd4_addr.bit.b6 #define pd4_7 pd4_addr.bit.b7 //************************************************* // Define Protect register //************************************************* union byte_def PRCR_addr; #define PRCR PRCR_addr.byte #define PRC0 PRCR_addr.bit.b0 #define PRC1 PRCR_addr.bit.b1 #define PRC_2 PRCR_addr.bit.b2 #define PRC3 PRCR_addr.bit.b3 #define PRC4 PRCR_addr.bit.b4 #define PRC_5 PRCR_addr.bit.b5 #define PRC_6 PRCR_addr.bit.b6 #define PRC_7 PRCR_addr.bit.b7 //************************************************* // Define OSC register //************************************************* union byte_def OCOCR_addr; #define OCOCR OCOCR_addr.byte #define HOCOE OCOCR_addr.bit.b0 #define LOCODIS OCOCR_addr.bit.b1 #define OCOCR_2 OCOCR_addr.bit.b2 #define OCOCR_3 OCOCR_addr.bit.b3 #define OCOCR_4 OCOCR_addr.bit.b4 #define OCOCR_5 OCOCR_addr.bit.b5 #define OCOCR_6 OCOCR_addr.bit.b6 #define OCOCR_7 OCOCR_addr.bit.b7 union byte_def EXCKCR_addr; #define EXCKCR EXCKCR_addr.byte #define CKPT0 EXCKCR_addr.bit.b0 #define CKPT1 EXCKCR_addr.bit.b1 #define EXCKCR_2 EXCKCR_addr.bit.b2 #define EXCKCR_3 EXCKCR_addr.bit.b3 #define EXCKCR_4 EXCKCR_addr.bit.b4 #define EXCKCR_5 EXCKCR_addr.bit.b5 #define XRCUT EXCKCR_addr.bit.b6 #define EXCKCR_7 EXCKCR_addr.bit.b7 union byte_def CSKCR_addr; #define CSKCR CSKCR_addr.byte #define PHISSEL0 CSKCR_addr.bit.b0 #define PHISSEL1 CSKCR_addr.bit.b1 #define PHISSEL2 CSKCR_addr.bit.b2 #define CSKCR_3 CSKCR_addr.bit.b3 #define CSKCR_4 CSKCR_addr.bit.b4 #define WAITM CSKCR_addr.bit.b5 #define HSCKSEL CSKCR_addr.bit.b6 #define CSKCR_7 CSKCR_addr.bit.b7 union byte_def CKSTPR_addr; #define CKSTPR CKSTPR_addr.byte #define STPM CKSTPR_addr.bit.b0 #define WCKSTP CKSTPR_addr.bit.b1 #define PSCSTP CKSTPR_addr.bit.b2 #define CKSTPR_3 CKSTPR_addr.bit.b3 #define CKSTPR_4 CKSTPR_addr.bit.b4 #define CKSTPR_5 CKSTPR_addr.bit.b5 #define CKSTPR_6 CKSTPR_addr.bit.b6 #define SCKSEL CKSTPR_addr.bit.b7 //************************************************* // Define UART0 register //************************************************* union byte_def U0MR_addr; #define U0MR U0MR_addr.byte #define SMD0 U0MR_addr.bit.b0 #define SMD1 U0MR_addr.bit.b1 #define SMD2 U0MR_addr.bit.b2 #define CKDIR U0MR_addr.bit.b3 #define STPS U0MR_addr.bit.b4 #define PRY U0MR_addr.bit.b5 #define PRYE U0MR_addr.bit.b6 #define U0MR_7 U0MR_addr.bit.b7 union byte_def U0BRG_addr; #define U0BRG U0BRG_addr.byte #define U0BRG_0 U0BRG_addr.bit.b0 #define U0BRG_1 U0BRG_addr.bit.b1 #define U0BRG_2 U0BRG_addr.bit.b2 #define U0BRG_3 U0BRG_addr.bit.b3 #define U0BRG_4 U0BRG_addr.bit.b4 #define U0BRG_5 U0BRG_addr.bit.b5 #define U0BRG_6 U0BRG_addr.bit.b6 #define U0BRG_7 U0BRG_addr.bit.b7 #define U0TB U0TB_addr.word #define U0TBL U0TB_addr.byte.low #define U0TBH U0TB_addr.byte.high union byte_def U0C0_addr; #define U0C0 U0C0_addr.byte #define CLK0 U0C0_addr.bit.b0 #define CLK1 U0C0_addr.bit.b1 #define U0C0_2 U0C0_addr.bit.b2 #define TXEPT U0C0_addr.bit.b3 #define DFE U0C0_addr.bit.b4 #define NCH U0C0_addr.bit.b5 #define CKPOL U0C0_addr.bit.b6 #define UFORM U0C0_addr.bit.b7 union byte_def U0C1_addr; #define U0C1 U0C1_addr.byte #define TE U0C1_addr.bit.b0 #define TI U0C1_addr.bit.b1 #define RE U0C1_addr.bit.b2 #define RI U0C1_addr.bit.b3 #define U0IRS U0C1_addr.bit.b4 #define U0RRM U0C1_addr.bit.b5 #define U0C1_6 U0C1_addr.bit.b6 #define U0C1_7 U0C1_addr.bit.b7 #define U0RB U0RB_addr.word #define U0RBL U0RB_addr.byte.low #define U0RBH U0RB_addr.byte.high #define OER_U0RB U0RB_addr.bit.oer /* Overrun error flag */ #define FER_U0RB U0RB_addr.bit.fer /* Framing error flag */ #define PER_U0RB U0RB_addr.bit.per /* Parity error flag */ #define SUM_U0RB U0RB_addr.bit.sum /* Error sum flag */ union byte_def U0IR_addr; #define U0IR U0IR_addr.byte #define U0IR_0 U0IR_addr.bit.b0 #define U0IR_1 U0IR_addr.bit.b1 #define U0RIE U0IR_addr.bit.b2 #define U0TIE U0IR_addr.bit.b3 #define U0IR_4 U0IR_addr.bit.b4 #define U0IR_5 U0IR_addr.bit.b5 #define U0RIF U0IR_addr.bit.b6 #define U0TIF U0IR_addr.bit.b7 // // union byte_def PML1_addr; #define PML1 PML1_addr.byte #define P10SEL0 PML1_addr.bit.b0 #define P10SEL1 PML1_addr.bit.b1 #define P11SEL0 PML1_addr.bit.b2 #define P11SEL1 PML1_addr.bit.b3 #define P12SEL0 PML1_addr.bit.b4 #define P12SEL1 PML1_addr.bit.b5 #define P13SEL0 PML1_addr.bit.b6 #define P13SEL1 PML1_addr.bit.b7 union byte_def PMH1_addr; #define PMH1 PMH1_addr.byte #define P14SEL0 PMH1_addr.bit.b0 #define P14SEL1 PMH1_addr.bit.b1 #define P15SEL0 PMH1_addr.bit.b2 #define P15SEL1 PMH1_addr.bit.b3 #define P16SEL0 PMH1_addr.bit.b4 #define P16SEL1 PMH1_addr.bit.b5 #define P17SEL0 PMH1_addr.bit.b6 #define P17SEL1 PMH1_addr.bit.b7 union byte_def PMH1E_addr; #define PMH1E PMH1E_addr.byte #define P14SEL2 PMH1E_addr.bit.b0 #define PMH1E_1 PMH1E_addr.bit.b1 #define P15SEL2 PMH1E_addr.bit.b2 #define PMH1E_3 PMH1E_addr.bit.b3 #define PMH1E_4 PMH1E_addr.bit.b4 #define PMH1E_5 PMH1E_addr.bit.b5 #define PMH1E_6 PMH1E_addr.bit.b6 #define PMH1E_7 PMH1E_addr.bit.b7 union byte_def PML4_addr; #define PML4 PML4_addr.byte #define PML4_0 PML4_addr.bit.b0 #define PML4_1 PML4_addr.bit.b1 #define PML4_2 PML4_addr.bit.b2 #define PML4_3 PML4_addr.bit.b3 #define P42SEL0 PML4_addr.bit.b4 #define P42SEL1 PML4_addr.bit.b5 #define PML4_6 PML4_addr.bit.b6 #define PML4_7 PML4_addr.bit.b7 union byte_def PMH4_addr; #define PMH4 PMH4_addr.byte #define PMH4_0 PMH4_addr.bit.b0 #define PMH4_1 PMH4_addr.bit.b1 #define P45SEL0 PMH4_addr.bit.b2 #define P45SEL1 PMH4_addr.bit.b3 #define P46SEL0 PMH4_addr.bit.b4 #define P46SEL1 PMH4_addr.bit.b5 #define P47SEL0 PMH4_addr.bit.b6 #define P47SEL1 PMH4_addr.bit.b7 union byte_def PMH4E_addr; #define PMH4E PMH4E_addr.byte #define PMH4E_0 PMH4E_addr.bit.b0 #define PMH4E_1 PMH4E_addr.bit.b1 #define PMH4E_2 PMH4E_addr.bit.b2 #define PMH4E_3 PMH4E_addr.bit.b3 #define P46SEL2 PMH4E_addr.bit.b4 #define PMH4E_5 PMH4E_addr.bit.b5 #define PMH4E_6 PMH4E_addr.bit.b6 #define PMH4E_7 PMH4E_addr.bit.b7 //************************************************* // Define ADC register //************************************************* #define AD0 AD0_addr.word #define AD0L AD0_addr.byte.low #define AD0H AD0_addr.byte.high #define AD1 AD1_addr.word #define AD1L AD1_addr.byte.low #define AD1H AD1_addr.byte.high union byte_def ADMOD_addr; #define ADMOD ADMOD_addr.byte #define CKS0 ADMOD_addr.bit.b0 #define CKS1 ADMOD_addr.bit.b1 #define CKS2 ADMOD_addr.bit.b2 #define MD0 ADMOD_addr.bit.b3 #define MD1 ADMOD_addr.bit.b4 #define ADMOD_5 ADMOD_addr.bit.b5 #define ADCAP0 ADMOD_addr.bit.b6 #define ADCAP1 ADMOD_addr.bit.b7 union byte_def ADINSEL_addr; #define ADINSEL ADINSEL_addr.byte #define CH0 ADINSEL_addr.bit.b0 #define ADINSEL_1 ADINSEL_addr.bit.b1 #define ADINSEL_2 ADINSEL_addr.bit.b2 #define ADINSEL_3 ADINSEL_addr.bit.b3 #define ADINSEL_4 ADINSEL_addr.bit.b4 #define ADINSEL_5 ADINSEL_addr.bit.b5 #define ADGSEL0 ADINSEL_addr.bit.b6 #define ADGSEL1 ADINSEL_addr.bit.b7 union byte_def ADCON0_addr; #define ADCON0 ADCON0_addr.byte #define ADST ADCON0_addr.bit.b0 #define ADCON0_1 ADCON0_addr.bit.b1 #define ADCON0_2 ADCON0_addr.bit.b2 #define ADCON0_3 ADCON0_addr.bit.b3 #define ADCON0_4 ADCON0_addr.bit.b4 #define ADCON0_5 ADCON0_addr.bit.b5 #define ADCON0_6 ADCON0_addr.bit.b6 #define ADCON0_7 ADCON0_addr.bit.b7 union byte_def ADICSR_addr; #define ADICSR ADICSR_addr.byte #define ADICSR_0 ADICSR_addr.bit.b0 #define ADICSR_1 ADICSR_addr.bit.b1 #define ADICSR_2 ADICSR_addr.bit.b2 #define ADICSR_3 ADICSR_addr.bit.b3 #define ADICSR_4 ADICSR_addr.bit.b4 #define ADICSR_5 ADICSR_addr.bit.b5 #define ADIE ADICSR_addr.bit.b6 #define ADF ADICSR_addr.bit.b7 //************************************************* // Define TIMER R/C register //************************************************* #define TRCCNT TRCCNT_addr.word #define TRCCNTL TRCCNT_addr.byte.low #define TRCCNTH TRCCNT_addr.byte.high #define TRCGRA TRCGRA_addr.word #define TRCGRAL TRCGRA_addr.byte.low #define TRCGRAH TRCGRA_addr.byte.high #define TRCGRB TRCGRB_addr.word #define TRCGRBL TRCGRB_addr.byte.low #define TRCGRBH TRCGRB_addr.byte.high #define TRCGRC TRCGRC_addr.word #define TRCGRCL TRCGRC_addr.byte.low #define TRCGRCH TRCGRC_addr.byte.high #define TRCGRD TRCGRD_addr.word #define TRCGRDL TRCGRD_addr.byte.low #define TRCGRDH TRCGRD_addr.byte.high union byte_def TRCMR_addr; #define TRCMR TRCMR_addr.byte #define PWMB TRCMR_addr.bit.b0 #define PWMC TRCMR_addr.bit.b1 #define PWMD TRCMR_addr.bit.b2 #define PWM2 TRCMR_addr.bit.b3 #define BUFEA TRCMR_addr.bit.b4 #define BUFEB TRCMR_addr.bit.b5 #define TRCMR_6 TRCMR_addr.bit.b6 #define CTS TRCMR_addr.bit.b7 union byte_def TRCCR1_addr; #define TRCCR1 TRCCR1_addr.byte #define TOA TRCCR1_addr.bit.b0 #define TOB TRCCR1_addr.bit.b1 #define TOC TRCCR1_addr.bit.b2 #define TOD TRCCR1_addr.bit.b3 #define CKS0_TRCCR1 TRCCR1_addr.bit.b4 #define CKS1_TRCCR1 TRCCR1_addr.bit.b5 #define CKS2_TRCCR1 TRCCR1_addr.bit.b6 #define CCLR TRCCR1_addr.bit.b7 union byte_def TRCIER_addr; #define TRCIER TRCIER_addr.byte #define IMIEA TRCIER_addr.bit.b0 #define IMIEB TRCIER_addr.bit.b1 #define IMIEC TRCIER_addr.bit.b2 #define IMIED TRCIER_addr.bit.b3 #define TRCIER_4 TRCIER_addr.bit.b4 #define TRCIER_5 TRCIER_addr.bit.b5 #define TRCIER_6 TRCIER_addr.bit.b6 #define OVIE TRCIER_addr.bit.b7 union byte_def TRCSR_addr; #define TRCSR TRCSR_addr.byte #define IMFA TRCSR_addr.bit.b0 #define IMFB TRCSR_addr.bit.b1 #define IMFC TRCSR_addr.bit.b2 #define IMFD TRCSR_addr.bit.b3 #define TRCSR_4 TRCSR_addr.bit.b4 #define TRCSR_5 TRCSR_addr.bit.b5 #define TRCSR_6 TRCSR_addr.bit.b6 #define OVF TRCSR_addr.bit.b7 union byte_def TRCIOR0_addr; #define TRCIOR0 TRCIOR0_addr.byte #define IOA0 TRCIOR0_addr.bit.b0 #define IOA1 TRCIOR0_addr.bit.b1 #define IOA2 TRCIOR0_addr.bit.b2 #define TRCIOR0_3 TRCIOR0_addr.bit.b3 #define IOB0 TRCIOR0_addr.bit.b4 #define IOB1 TRCIOR0_addr.bit.b5 #define IOB2 TRCIOR0_addr.bit.b6 #define TRCIOR0_7 TRCIOR0_addr.bit.b7 union byte_def TRCIOR1_addr; #define TRCIOR1 TRCIOR1_addr.byte #define IOC0 TRCIOR1_addr.bit.b0 #define IOC1 TRCIOR1_addr.bit.b1 #define IOC2 TRCIOR1_addr.bit.b2 #define IOC3 TRCIOR1_addr.bit.b3 #define IOD0 TRCIOR1_addr.bit.b4 #define IOD1 TRCIOR1_addr.bit.b5 #define IOD2 TRCIOR1_addr.bit.b6 #define IOD3 TRCIOR1_addr.bit.b7 union byte_def TRCCR2_addr; #define TRCCR2 TRCCR2_addr.byte #define POLB TRCCR2_addr.bit.b0 #define POLC TRCCR2_addr.bit.b1 #define POLD TRCCR2_addr.bit.b2 #define TRCCR2_3 TRCCR2_addr.bit.b3 #define TRCCR2_4 TRCCR2_addr.bit.b4 #define CSTP TRCCR2_addr.bit.b5 #define TCEG0 TRCCR2_addr.bit.b6 #define TCEG1 TRCCR2_addr.bit.b7 union byte_def TRCDF_addr; #define TRCDF TRCDF_addr.byte #define DFA TRCDF_addr.bit.b0 #define DFB TRCDF_addr.bit.b1 #define DFC TRCDF_addr.bit.b2 #define DFD TRCDF_addr.bit.b3 #define DFTRG TRCDF_addr.bit.b4 #define TRCDF_5 TRCDF_addr.bit.b5 #define DFCK0 TRCDF_addr.bit.b6 #define DFCK1 TRCDF_addr.bit.b7 union byte_def TRCOER_addr; #define TRCOER TRCOER_addr.byte #define EA TRCOER_addr.bit.b0 #define EB TRCOER_addr.bit.b1 #define EC TRCOER_addr.bit.b2 #define ED TRCOER_addr.bit.b3 #define TRCOER_4 TRCOER_addr.bit.b4 #define TRCOER_5 TRCOER_addr.bit.b5 #define TRCOER_6 TRCOER_addr.bit.b6 #define PTO TRCOER_addr.bit.b7 union byte_def TRCADCR_addr; #define TRCADCR TRCADCR_addr.byte #define ADTRGAE TRCADCR_addr.bit.b0 #define ADTRGBE TRCADCR_addr.bit.b1 #define ADTRGCE TRCADCR_addr.bit.b2 #define ADTRGDE TRCADCR_addr.bit.b3 #define TRCADCR_4 TRCADCR_addr.bit.b4 #define TRCADCR_5 TRCADCR_addr.bit.b5 #define TRCADCR_6 TRCADCR_addr.bit.b6 #define TRCADCR_7 TRCADCR_addr.bit.b7 union byte_def TRCOPR_addr; #define TRCOPR TRCOPR_addr.byte #define OPSEL0 TRCOPR_addr.bit.b0 #define OPSEL1 TRCOPR_addr.bit.b1 #define OPOL0 TRCOPR_addr.bit.b2 #define OPOL1 TRCOPR_addr.bit.b3 #define RESTATS TRCOPR_addr.bit.b4 #define OPE TRCOPR_addr.bit.b5 #define TRCOPR_6 TRCOPR_addr.bit.b6 #define TRCOPR_7 TRCOPR_addr.bit.b7 //************************************************* // Define TIMER RJ2 register //************************************************* #define TRJ TRJ_addr.word #define TRJL TRJ_addr.byte.low #define TRJH TRJ_addr.byte.high // union byte_def TRJCR_addr; #define TRJCR TRJCR_addr.byte #define TSTART TRJCR_addr.bit.b0 #define TCSTF TRJCR_addr.bit.b1 #define TSTOP TRJCR_addr.bit.b2 #define TRJCR_3 TRJCR_addr.bit.b3 #define TEDGF TRJCR_addr.bit.b4 #define TUNDF TRJCR_addr.bit.b5 #define TRJCR_6 TRJCR_addr.bit.b6 #define TRJCR_7 TRJCR_addr.bit.b7 // union byte_def TRJIOC_addr; #define TRJIOC TRJIOC_addr.byte #define TEDGSEL TRJIOC_addr.bit.b0 #define TOPCR TRJIOC_addr.bit.b1 #define TRJIOC_2 TRJIOC_addr.bit.b2 #define TRJIOC_3 TRJIOC_addr.bit.b3 #define TIPF0 TRJIOC_addr.bit.b4 #define TIPF1 TRJIOC_addr.bit.b5 #define TIOGT0 TRJIOC_addr.bit.b6 #define TIOGT1 TRJIOC_addr.bit.b7 // union byte_def TRJMR_addr; #define TRJMR TRJMR_addr.byte #define TMOD0 TRJMR_addr.bit.b0 #define TMOD1 TRJMR_addr.bit.b1 #define TMOD2 TRJMR_addr.bit.b2 #define TEDGPL TRJMR_addr.bit.b3 #define TCK0 TRJMR_addr.bit.b4 #define TCK1 TRJMR_addr.bit.b5 #define TCK2 TRJMR_addr.bit.b6 #define TCKCUT TRJMR_addr.bit.b7 // union byte_def TRJISR_addr; #define TRJISR TRJISR_addr.byte #define RCCPSEL0 TRJISR_addr.bit.b0 #define RCCPSEL1 TRJISR_addr.bit.b1 #define RCCPSEL2 TRJISR_addr.bit.b2 #define TRJISR_3 TRJISR_addr.bit.b3 #define TRJISR_4 TRJISR_addr.bit.b4 #define TRJISR_5 TRJISR_addr.bit.b5 #define TRJISR_6 TRJISR_addr.bit.b6 #define TRJISR_7 TRJISR_addr.bit.b7 // union byte_def TRJIR_addr; #define TRJIR TRJIR_addr.byte #define TRJIR_0 TRJIR_addr.bit.b0 #define TRJIR_1 TRJIR_addr.bit.b1 #define TRJIR_2 TRJIR_addr.bit.b2 #define TRJIR_3 TRJIR_addr.bit.b3 #define TRJIR_4 TRJIR_addr.bit.b4 #define TRJIR_5 TRJIR_addr.bit.b5 #define TRJIF TRJIR_addr.bit.b6 #define TRJIE TRJIR_addr.bit.b7 //************************************************* // Define Function //************************************************* void Int_OSC(void); void TimerRJ2(void); void Wait_1mS(unsigned int); void main(void) { unsigned int LEDlst = 0; // ******************************* // 1.Initialized segment // ******************************* // (1)Select Osc (Select 20MHz Internal OSC) Int_OSC(); // (2)Define I/O PORT pd1=0xff; //Derection p1=0x00; //Port1 Initialize // ******************************* // 2.Program main // ******************************* LEDlst = 1; while(1){ if(LEDlst == 1){ LEDlst = 2; }else if(LEDlst > 127){ LEDlst = 1; }else{ LEDlst = LEDlst * 2; } p1 = LEDlst; Wait_1mS((unsigned int)1000); } } //****************************************************************************************** // Function Name : Int_OSC // Title : 高速オンチップオシレータ(20MHz)にする // Input : // Output : // Description : ※実測値　20.15MHz //****************************************************************************************** void Int_OSC(void) { unsigned int lp; // 1.割り込み禁止 asm("FCLR I"); // 2.レジスタの書き込みを許可する PRC0 = 1; //Write enable EXCKCR、OCOCR、SCKCR、PHISEL、CKSTPR、CKRSCR、BAKCR、FRV1、FRV2 // 3.高速オンチップオシレータを発振させる(OCOCR) HOCOE = 1; //高速オンチップオシレータ発振 // 4.テスト用設定（システムクロックをＰ４＿７に出力する）(EXCKCR) // CKPT1 = 1; //(ＴＥＳＴ用　システムクロック出力設定) // CKPT0 = 0; //(ＴＥＳＴ用　システムクロック出力設定) // 5.CPUクロック分周比選択ビット（分周なし）(SCKCR) PHISSEL0 = 0; PHISSEL1 = 0; PHISSEL2 = 0; // 6.高速オンチップオシレータクロック選択(SCKCR) HSCKSEL = 1; // 7.全クロック停止制御ビット(0：クロック発振)(CKSTPR) STPM = 0; // 8.システム基準クロック選択ビット(高速）(CKSTPR) SCKSEL = 1; // 9.Wait for(lp=0;lp<100;lp++){ asm("NOP"); } // 10.レジスタの書き込みを不許可にする PRC0 = 0; //Write disable EXCKCR、OCOCR、SCKCR、PHISEL、CKSTPR、CKRSCR、BAKCR、FRV1、FRV2 } //****************************************************************************************** // Function Name : Wait_1mS // Title : wait function 1mS * n // Input : // Output : // Description : //****************************************************************************************** void Wait_1mS(unsigned int n) { unsigned int lp; for( lp=0 ; lp 20000000[Hz] * 0.001[S] ==> 20000(0x4E20) TRJ = 0x4E20; // ****************************** // 2.TimerRJ2のスタート // ****************************** // (1)タイマスタート TSTART = 1; // (2)終了チェック while(TUNDF == 0); }