/***********************************************************************/ /* */ /* FILE :TEST0036_R8C2B_ADC.c */ /* DATE :Thu, Jan 17, 2013 */ /* DESCRIPTION :Main Program */ /* CPU GROUP :Other */ /* */ /* This file is generated by Renesas Project Generator (Ver.4.19). */ /* NOTE:THIS IS A TYPICAL EXAMPLE. */ /***********************************************************************/ //************************************************* // Define Address(R8C/2Bマイコン用) //************************************************* #pragma ADDRESS PD0_addr 00E2H #pragma ADDRESS PD1_addr 00E3H #pragma ADDRESS PD2_addr 00E6H #pragma ADDRESS PD3_addr 00E7H #pragma ADDRESS PD4_addr 00EAH #pragma ADDRESS PD5_addr 00EBH #pragma ADDRESS PD6_addr 00EEH #pragma ADDRESS PD8_addr 02E4H #pragma ADDRESS P0_addr 00E0H #pragma ADDRESS P1_addr 00E1H #pragma ADDRESS P2_addr 00E4H #pragma ADDRESS P3_addr 00E5H #pragma ADDRESS P4_addr 00E8H #pragma ADDRESS P5_addr 00E9H #pragma ADDRESS P6_addr 00ECH #pragma ADDRESS P8_addr 02E6H #pragma ADDRESS P2DRR_addr 00F4H #pragma ADDRESS PMR_addr 00F8H #pragma ADDRESS PUR0_addr 00FCH #pragma ADDRESS PUR1_addr 00FDH #pragma ADDRESS PUR2_addr 02FCH #pragma ADDRESS PRCR_addr 000AH #pragma ADDRESS CM0_addr 0006H #pragma ADDRESS CM1_addr 0007H #pragma ADDRESS OCD_addr 000CH #pragma ADDRESS FRA0_addr 0023H #pragma ADDRESS FRA2_addr 0025H #pragma ADDRESS CPSRF_addr 0028H #pragma ADDRESS VCA2_addr 0032H #pragma ADDRESS U0MR_addr 00A0h #pragma ADDRESS U1MR_addr 00A8h #pragma ADDRESS U2MR_addr 0160h #pragma ADDRESS U0BRG_addr 00A1h #pragma ADDRESS U1BRG_addr 00A9h #pragma ADDRESS U2BRG_addr 0161h #pragma ADDRESS U0TB_addr 00A2h //00A2h-00A3h #pragma ADDRESS U1TB_addr 00AAh //00AAh-00ABh #pragma ADDRESS U2TB_addr 0162h //0162h-0163h #pragma ADDRESS U0C0_addr 00A4h #pragma ADDRESS U1C0_addr 00ACh #pragma ADDRESS U2C0_addr 0164h #pragma ADDRESS U0C1_addr 00A5h #pragma ADDRESS U1C1_addr 00ADh #pragma ADDRESS U2C1_addr 0165h #pragma ADDRESS U0RB_addr 00A6h //00A6h-00A7h #pragma ADDRESS U1RB_addr 00AEh //00AEh-00AFh #pragma ADDRESS U2RB_addr 0166h //0166h-0167h #pragma ADDRESS U1SR_addr 00F5h #pragma ADDRESS PMR_addr 00F8h #pragma ADDRESS AD0_addr 02C0h //02C0h-02C1h #pragma ADDRESS ADCON2_addr 02D4h #pragma ADDRESS ADCON0_addr 02D6h #pragma ADDRESS ADCON1_addr 02D7h //************************************************* // Define Structure //************************************************* struct bit_def { char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; }; union byte_def{ struct bit_def bit; char byte; }; // union{ struct{ char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; char b8:1; char b9:1; char b10:1; char b11:1; char b12:1; char b13:1; char b14:1; char b15:1; }bit; struct{ char low; /* low 8 bit */ char high; /* high 8 bit */ }byte; unsigned int word; } U0TB_addr,U1TB_addr,U2TB_addr; // union{ struct{ char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; char b8:1; char b9:1; char b10:1; char b11:1; char oer:1; /* Overrun error flag */ char fer:1; /* Framing error flag */ char per:1; /* Parity error flag */ char sum:1; /* Error sum flag */ }bit; struct{ char low; /* Low 8 bit */ char high; /* High 8 bit */ }byte; unsigned short word; }U0RB_addr,U1RB_addr,U2RB_addr; // union{ struct{ char b0:1; char b1:1; char b2:1; char b3:1; char b4:1; char b5:1; char b6:1; char b7:1; char b8:1; char b9:1; char b10:1; char b11:1; char b12:1; char b13:1; char b14:1; char b15:1; }bit; struct{ char low; /* Low 8 bit */ char high; /* High 8 bit */ }byte; unsigned short word; }AD0_addr; //************************************************* // Define Port register and Port direction register //************************************************* union byte_def P0_addr; #define P0 P0_addr.byte #define P0_0 P0_addr.bit.b0 #define P0_1 P0_addr.bit.b1 #define P0_2 P0_addr.bit.b2 #define P0_3 P0_addr.bit.b3 #define P0_4 P0_addr.bit.b4 #define P0_5 P0_addr.bit.b5 #define P0_6 P0_addr.bit.b6 #define P0_7 P0_addr.bit.b7 // union byte_def PD0_addr; #define PD0 PD0_addr.byte #define PD0_0 PD0_addr.bit.b0 #define PD0_1 PD0_addr.bit.b1 #define PD0_2 PD0_addr.bit.b2 #define PD0_3 PD0_addr.bit.b3 #define PD0_4 PD0_addr.bit.b4 #define PD0_5 PD0_addr.bit.b5 #define PD0_6 PD0_addr.bit.b6 #define PD0_7 PD0_addr.bit.b7 // union byte_def P1_addr; #define P1 P1_addr.byte #define P1_0 P1_addr.bit.b0 #define P1_1 P1_addr.bit.b1 #define P1_2 P1_addr.bit.b2 #define P1_3 P1_addr.bit.b3 #define P1_4 P1_addr.bit.b4 #define P1_5 P1_addr.bit.b5 #define P1_6 P1_addr.bit.b6 #define P1_7 P1_addr.bit.b7 // union byte_def PD1_addr; #define PD1 PD1_addr.byte #define PD1_0 PD1_addr.bit.b0 #define PD1_1 PD1_addr.bit.b1 #define PD1_2 PD1_addr.bit.b2 #define PD1_3 PD1_addr.bit.b3 #define PD1_4 PD1_addr.bit.b4 #define PD1_5 PD1_addr.bit.b5 #define PD1_6 PD1_addr.bit.b6 #define PD1_7 PD1_addr.bit.b7 // union byte_def P2_addr; #define P2 P2_addr.byte #define P2_0 P2_addr.bit.b0 #define P2_1 P2_addr.bit.b1 #define P2_2 P2_addr.bit.b2 #define P2_3 P2_addr.bit.b3 #define P2_4 P2_addr.bit.b4 #define P2_5 P2_addr.bit.b5 #define P2_6 P2_addr.bit.b6 #define P2_7 P2_addr.bit.b7 // union byte_def PD2_addr; #define PD2 PD2_addr.byte #define PD2_0 PD2_addr.bit.b0 #define PD2_1 PD2_addr.bit.b1 #define PD2_2 PD2_addr.bit.b2 #define PD2_3 PD2_addr.bit.b3 #define PD2_4 PD2_addr.bit.b4 #define PD2_5 PD2_addr.bit.b5 #define PD2_6 PD2_addr.bit.b6 #define PD2_7 PD2_addr.bit.b7 // union byte_def P2DRR_addr; #define P2DRR P2DRR_addr.byte #define P2DRR0 P2DRR_addr.bit.b0 #define P2DRR1 P2DRR_addr.bit.b1 #define P2DRR2 P2DRR_addr.bit.b2 #define P2DRR3 P2DRR_addr.bit.b3 #define P2DRR4 P2DRR_addr.bit.b4 #define P2DRR5 P2DRR_addr.bit.b5 #define P2DRR6 P2DRR_addr.bit.b6 #define P2DRR7 P2DRR_addr.bit.b7 // union byte_def P3_addr; #define P3 P3_addr.byte #define P3_0 P3_addr.bit.b0 #define P3_1 P3_addr.bit.b1 #define P3_2 P3_addr.bit.b2 #define P3_3 P3_addr.bit.b3 #define P3_4 P3_addr.bit.b4 #define P3_5 P3_addr.bit.b5 #define P3_6 P3_addr.bit.b6 #define P3_7 P3_addr.bit.b7 // union byte_def PD3_addr; #define PD3 PD3_addr.byte #define PD3_0 PD3_addr.bit.b0 #define PD3_1 PD3_addr.bit.b1 #define PD3_2 PD3_addr.bit.b2 #define PD3_3 PD3_addr.bit.b3 #define PD3_4 PD3_addr.bit.b4 #define PD3_5 PD3_addr.bit.b5 #define PD3_6 PD3_addr.bit.b6 #define PD3_7 PD3_addr.bit.b7 // union byte_def P4_addr; #define P4 P4_addr.byte #define P4_0_DUM P4_addr.bit.b0 #define P4_1_DUM P4_addr.bit.b1 #define P4_2_DUM P4_addr.bit.b2 #define P4_3 P4_addr.bit.b3 #define P4_4 P4_addr.bit.b4 #define P4_5 P4_addr.bit.b5 #define P4_6_DUM P4_addr.bit.b6 #define P4_7_DUM P4_addr.bit.b7 // union byte_def PD4_addr; #define PD4 PD4_addr.byte #define PD4_0_DUM PD4_addr.bit.b0 #define PD4_1_DUM PD4_addr.bit.b1 #define PD4_2_DUM PD4_addr.bit.b2 #define PD4_3 PD4_addr.bit.b3 #define PD4_4 PD4_addr.bit.b4 #define PD4_5 PD4_addr.bit.b5 #define PD4_6_DUM PD4_addr.bit.b6 #define PD4_7_DUM PD4_addr.bit.b7 // union byte_def P5_addr; #define P5 P5_addr.byte #define P5_0 P5_addr.bit.b0 #define P5_1 P5_addr.bit.b1 #define P5_2 P5_addr.bit.b2 #define P5_3 P5_addr.bit.b3 #define P5_4 P5_addr.bit.b4 #define P5_5_DUM P5_addr.bit.b5 #define P5_6_DUM P5_addr.bit.b6 #define P5_7_DUM P5_addr.bit.b7 // union byte_def PD5_addr; #define PD5 PD5_addr.byte #define PD5_0 PD5_addr.bit.b0 #define PD5_1 PD5_addr.bit.b1 #define PD5_2 PD5_addr.bit.b2 #define PD5_3 PD5_addr.bit.b3 #define PD5_4 PD5_addr.bit.b4 #define PD5_5_DUM PD5_addr.bit.b5 #define PD5_6_DUM PD5_addr.bit.b6 #define PD5_7_DUM PD5_addr.bit.b7 // union byte_def P6_addr; #define P6 P6_addr.byte #define P6_0 P6_addr.bit.b0 #define P6_1 P6_addr.bit.b1 #define P6_2 P6_addr.bit.b2 #define P6_3 P6_addr.bit.b3 #define P6_4 P6_addr.bit.b4 #define P6_5 P6_addr.bit.b5 #define P6_6 P6_addr.bit.b6 #define P6_7 P6_addr.bit.b7 // union byte_def PD6_addr; #define PD6 PD6_addr.byte #define PD6_0 PD6_addr.bit.b0 #define PD6_1 PD6_addr.bit.b1 #define PD6_2 PD6_addr.bit.b2 #define PD6_3 PD6_addr.bit.b3 #define PD6_4 PD6_addr.bit.b4 #define PD6_5 PD6_addr.bit.b5 #define PD6_6 PD6_addr.bit.b6 #define PD6_7 PD6_addr.bit.b7 // union byte_def P8_addr; #define P8 P8_addr.byte #define P8_0 P8_addr.bit.b0 #define P8_1 P8_addr.bit.b1 #define P8_2 P8_addr.bit.b2 #define P8_3 P8_addr.bit.b3 #define P8_4 P8_addr.bit.b4 #define P8_5 P8_addr.bit.b5 #define P8_6 P8_addr.bit.b6 #define P8_7_DUM P8_addr.bit.b7 // union byte_def PD8_addr; #define PD8 PD8_addr.byte #define PD8_0 PD8_addr.bit.b0 #define PD8_1 PD8_addr.bit.b1 #define PD8_2 PD8_addr.bit.b2 #define PD8_3 PD8_addr.bit.b3 #define PD8_4 PD8_addr.bit.b4 #define PD8_5 PD8_addr.bit.b5 #define PD8_6 PD8_addr.bit.b6 #define PD8_7_DUM PD8_addr.bit.b7 // union byte_def PMR_addr; #define PMR PMR_addr.byte #define INT1SEL PMR_addr.bit.b0 #define INT2SEL PMR_addr.bit.b1 #define PMR_2 PMR_addr.bit.b2 #define PMR_3 PMR_addr.bit.b3 #define U1PINSEL PMR_addr.bit.b4 #define PMR_5 PMR_addr.bit.b5 #define PMR_6 PMR_addr.bit.b6 #define IICSEL PMR_addr.bit.b7 // union byte_def PUR0_addr; #define PUR0 PUR0_addr.byte #define PU00 PUR0_addr.bit.b0 #define PU01 PUR0_addr.bit.b1 #define PU02 PUR0_addr.bit.b2 #define PU03 PUR0_addr.bit.b3 #define PU04 PUR0_addr.bit.b4 #define PU05 PUR0_addr.bit.b5 #define PU06 PUR0_addr.bit.b6 #define PU07 PUR0_addr.bit.b7 // union byte_def PUR1_addr; #define PUR1 PUR1_addr.byte #define PU10 PUR1_addr.bit.b0 #define PU11 PUR1_addr.bit.b1 #define PU12 PUR1_addr.bit.b2 #define PU13 PUR1_addr.bit.b3 #define PU14 PUR1_addr.bit.b4 #define PU15 PUR1_addr.bit.b5 #define PU16 PUR1_addr.bit.b6 #define PU17 PUR1_addr.bit.b7 // union byte_def PUR2_addr; #define PUR2 PUR2_addr.byte #define PUR2_0 PUR2_addr.bit.b0 #define PUR2_1 PUR2_addr.bit.b1 #define PU22 PUR2_addr.bit.b2 #define PU23 PUR2_addr.bit.b3 #define PUR2_4 PUR2_addr.bit.b4 #define PUR2_5 PUR2_addr.bit.b5 #define PUR2_6 PUR2_addr.bit.b6 #define PUR2_7 PUR2_addr.bit.b7 //************************************************* // Define Protect register //************************************************* union byte_def PRCR_addr; #define PRCR PRCR_addr.byte #define PRC0 PRCR_addr.bit.b0 #define PRC1 PRCR_addr.bit.b1 #define PRC2 PRCR_addr.bit.b2 #define PRC3 PRCR_addr.bit.b3 #define PRCR_4 PRCR_addr.bit.b4 #define PRCR_5 PRCR_addr.bit.b5 #define PRCR_6 PRCR_addr.bit.b6 #define PRCR_7 PRCR_addr.bit.b7 //************************************************* // Define OSC //************************************************* union byte_def CM0_addr; #define CM0 CM0_addr.byte #define CM0_0 CM0_addr.bit.b0 #define CM0_1 CM0_addr.bit.b1 #define CM02 CM0_addr.bit.b2 #define CM03 CM0_addr.bit.b3 #define CM04 CM0_addr.bit.b4 #define CM05 CM0_addr.bit.b5 #define CM06 CM0_addr.bit.b6 #define CM07 CM0_addr.bit.b7 // union byte_def CM1_addr; #define CM1 CM1_addr.byte #define CM10 CM1_addr.bit.b0 #define CM11 CM1_addr.bit.b1 #define CM12 CM1_addr.bit.b2 #define CM13 CM1_addr.bit.b3 #define CM14 CM1_addr.bit.b4 #define CM15 CM1_addr.bit.b5 #define CM16 CM1_addr.bit.b6 #define CM17 CM1_addr.bit.b7 // union byte_def OCD_addr; #define OCD OCD_addr.byte #define OCD0 OCD_addr.bit.b0 #define OCD1 OCD_addr.bit.b1 #define OCD2 OCD_addr.bit.b2 #define OCD3 OCD_addr.bit.b3 #define OCD_4 OCD_addr.bit.b4 #define OCD_5 OCD_addr.bit.b5 #define OCD_6 OCD_addr.bit.b6 #define OCD_7 OCD_addr.bit.b7 // union byte_def FRA0_addr; #define FRA0 FRA0_addr.byte #define FRA00 FRA0_addr.bit.b0 #define FRA01 FRA0_addr.bit.b1 #define FRA0_2 FRA0_addr.bit.b2 #define FRA0_3 FRA0_addr.bit.b3 #define FRA0_4 FRA0_addr.bit.b4 #define FRA0_5 FRA0_addr.bit.b5 #define FRA0_6 FRA0_addr.bit.b6 #define FRA0_7 FRA0_addr.bit.b7 // union byte_def FRA2_addr; #define FRA2 FRA2_addr.byte #define FRA20 FRA2_addr.bit.b0 #define FRA21 FRA2_addr.bit.b1 #define FRA22 FRA2_addr.bit.b2 #define FRA2_3 FRA2_addr.bit.b3 #define FRA2_4 FRA2_addr.bit.b4 #define FRA2_5 FRA2_addr.bit.b5 #define FRA2_6 FRA2_addr.bit.b6 #define FRA2_7 FRA2_addr.bit.b7 // union byte_def CPSRF_addr; #define CPSRF CPSRF_addr.byte #define CPSRF_0 CPSRF_addr.bit.b0 #define CPSRF_1 CPSRF_addr.bit.b1 #define CPSRF_2 CPSRF_addr.bit.b2 #define CPSRF_3 CPSRF_addr.bit.b3 #define CPSRF_4 CPSRF_addr.bit.b4 #define CPSRF_5 CPSRF_addr.bit.b5 #define CPSRF_6 CPSRF_addr.bit.b6 #define CPSR CPSRF_addr.bit.b7 // union byte_def VCA2_addr; #define VCA2 VCA2_addr.byte #define VCA20 VCA2_addr.bit.b0 #define VCA2_1 VCA2_addr.bit.b1 #define VCA2_2 VCA2_addr.bit.b2 #define VCA2_3 VCA2_addr.bit.b3 #define VCA2_4 VCA2_addr.bit.b4 #define VCA25 VCA2_addr.bit.b5 #define VCA26 VCA2_addr.bit.b6 #define VCA27 VCA2_addr.bit.b7 //************************************************* // Define UART //************************************************* union byte_def U0MR_addr; #define U0MR U0MR_addr.byte #define SMD0_U0MR U0MR_addr.bit.b0 #define SMD1_U0MR U0MR_addr.bit.b1 #define SMD2_U0MR U0MR_addr.bit.b2 #define CKDIR_U0MR U0MR_addr.bit.b3 #define STPS_U0MR U0MR_addr.bit.b4 #define PRY_U0MR U0MR_addr.bit.b5 #define PRYE_U0MR U0MR_addr.bit.b6 #define U0MR_7 U0MR_addr.bit.b7 // union byte_def U1MR_addr; #define U1MR U1MR_addr.byte #define SMD0_U1MR U1MR_addr.bit.b0 #define SMD1_U1MR U1MR_addr.bit.b1 #define SMD2_U1MR U1MR_addr.bit.b2 #define CKDIR_U1MR U1MR_addr.bit.b3 #define STPS_U1MR U1MR_addr.bit.b4 #define PRY_U1MR U1MR_addr.bit.b5 #define PRYE_U1MR U1MR_addr.bit.b6 #define U1MR_7 U1MR_addr.bit.b7 // union byte_def U2MR_addr; #define U2MR U2MR_addr.byte #define SMD0_U2MR U2MR_addr.bit.b0 #define SMD1_U2MR U2MR_addr.bit.b1 #define SMD2_U2MR U2MR_addr.bit.b2 #define CKDIR_U2MR U2MR_addr.bit.b3 #define STPS_U2MR U2MR_addr.bit.b4 #define PRY_U2MR U2MR_addr.bit.b5 #define PRYE_U2MR U2MR_addr.bit.b6 #define U2MR_7 U2MR_addr.bit.b7 // union byte_def U0BRG_addr; #define U0BRG U0BRG_addr.byte #define U0BRG_0 U0BRG_addr.bit.b0 #define U0BRG_1 U0BRG_addr.bit.b1 #define U0BRG_2 U0BRG_addr.bit.b2 #define U0BRG_3 U0BRG_addr.bit.b3 #define U0BRG_4 U0BRG_addr.bit.b4 #define U0BRG_5 U0BRG_addr.bit.b5 #define U0BRG_6 U0BRG_addr.bit.b6 #define U0BRG_7 U0BRG_addr.bit.b7 // union byte_def U1BRG_addr; #define U1BRG U1BRG_addr.byte #define U1BRG_0 U1BRG_addr.bit.b0 #define U1BRG_1 U1BRG_addr.bit.b1 #define U1BRG_2 U1BRG_addr.bit.b2 #define U1BRG_3 U1BRG_addr.bit.b3 #define U1BRG_4 U1BRG_addr.bit.b4 #define U1BRG_5 U1BRG_addr.bit.b5 #define U1BRG_6 U1BRG_addr.bit.b6 #define U1BRG_7 U1BRG_addr.bit.b7 // union byte_def U2BRG_addr; #define U2BRG U2BRG_addr.byte #define U2BRG_0 U2BRG_addr.bit.b0 #define U2BRG_1 U2BRG_addr.bit.b1 #define U2BRG_2 U2BRG_addr.bit.b2 #define U2BRG_3 U2BRG_addr.bit.b3 #define U2BRG_4 U2BRG_addr.bit.b4 #define U2BRG_5 U2BRG_addr.bit.b5 #define U2BRG_6 U2BRG_addr.bit.b6 #define U2BRG_7 U2BRG_addr.bit.b7 // #define U0TB U0TB_addr.word #define U0TBL U0TB_addr.byte.low #define U0TBH U0TB_addr.byte.high // #define U1TB U1TB_addr.word #define U1TBL U1TB_addr.byte.low #define U1TBH U1TB_addr.byte.high // #define U2TB U2TB_addr.word #define U2TBL U2TB_addr.byte.low #define U2TBH U2TB_addr.byte.high // union byte_def U0C0_addr; #define U0C0 U0C0_addr.byte #define CLK0_U0C0 U0C0_addr.bit.b0 #define CLK1_U0C0 U0C0_addr.bit.b1 #define U0C0_2 U0C0_addr.bit.b2 #define TXEPT_U0C0 U0C0_addr.bit.b3 #define U0C0_4 U0C0_addr.bit.b4 #define NCH_U0C0 U0C0_addr.bit.b5 #define CKPOL_U0C0 U0C0_addr.bit.b6 #define UFORM_U0C0 U0C0_addr.bit.b7 // union byte_def U1C0_addr; #define U1C0 U1C0_addr.byte #define CLK0_U1C0 U1C0_addr.bit.b0 #define CLK1_U1C0 U1C0_addr.bit.b1 #define U1C0_2 U1C0_addr.bit.b2 #define TXEPT_U1C0 U1C0_addr.bit.b3 #define U1C0_4 U1C0_addr.bit.b4 #define NCH_U1C0 U1C0_addr.bit.b5 #define CKPOL_U1C0 U1C0_addr.bit.b6 #define UFORM_U1C0 U1C0_addr.bit.b7 // union byte_def U2C0_addr; #define U2C0 U2C0_addr.byte #define CLK0_U2C0 U2C0_addr.bit.b0 #define CLK1_U2C0 U2C0_addr.bit.b1 #define U2C0_2 U2C0_addr.bit.b2 #define TXEPT_U2C0 U2C0_addr.bit.b3 #define U2C0_4 U2C0_addr.bit.b4 #define NCH_U2C0 U2C0_addr.bit.b5 #define CKPOL_U2C0 U2C0_addr.bit.b6 #define UFORM_U2C0 U2C0_addr.bit.b7 // union byte_def U0C1_addr; #define U0C1 U0C1_addr.byte #define TE_U0C1 U0C1_addr.bit.b0 #define TI_U0C1 U0C1_addr.bit.b1 #define RE_U0C1 U0C1_addr.bit.b2 #define RI_U0C1 U0C1_addr.bit.b3 #define U0IRS U0C1_addr.bit.b4 #define U0RRM U0C1_addr.bit.b5 #define U0C1_6 U0C1_addr.bit.b6 #define U0C1_7 U0C1_addr.bit.b7 // union byte_def U1C1_addr; #define U1C1 U1C1_addr.byte #define TE_U1C1 U1C1_addr.bit.b0 #define TI_U1C1 U1C1_addr.bit.b1 #define RE_U1C1 U1C1_addr.bit.b2 #define RI_U1C1 U1C1_addr.bit.b3 #define U1IRS U1C1_addr.bit.b4 #define U1RRM U1C1_addr.bit.b5 #define U1C1_6 U1C1_addr.bit.b6 #define U1C1_7 U1C1_addr.bit.b7 // union byte_def U2C1_addr; #define U2C1 U2C1_addr.byte #define TE_U2C1 U2C1_addr.bit.b0 #define TI_U2C1 U2C1_addr.bit.b1 #define RE_U2C1 U2C1_addr.bit.b2 #define RI_U2C1 U2C1_addr.bit.b3 #define U2IRS U2C1_addr.bit.b4 #define U2RRM U2C1_addr.bit.b5 #define U2C1_6 U2C1_addr.bit.b6 #define U2C1_7 U2C1_addr.bit.b7 // #define U0RB U0RB_addr.word #define U0RBL U0RB_addr.byte.low #define U0RBH U0RB_addr.byte.high #define OER_U0RB U0RB_addr.bit.oer /* Overrun error flag */ #define FER_U0RB U0RB_addr.bit.fer /* Framing error flag */ #define PER_U0RB U0RB_addr.bit.per /* Parity error flag */ #define SUM_U0RB U0RB_addr.bit.sum /* Error sum flag */ // #define U1RB U1RB_addr.word #define U1RBL U1RB_addr.byte.low #define U1RBH U1RB_addr.byte.high #define OER_U1RB U1RB_addr.bit.oer /* Overrun error flag */ #define FER_U1RB U1RB_addr.bit.fer /* Framing error flag */ #define PER_U1RB U1RB_addr.bit.per /* Parity error flag */ #define SUM_U1RB U1RB_addr.bit.sum /* Error sum flag */ // #define U2RB U2RB_addr.word #define U2RBL U2RB_addr.byte.low #define U2RBH U2RB_addr.byte.high #define OER_U2RB U2RB_addr.bit.oer /* Overrun error flag */ #define FER_U2RB U2RB_addr.bit.fer /* Framing error flag */ #define PER_U2RB U2RB_addr.bit.per /* Parity error flag */ #define SUM_U2RB U2RB_addr.bit.sum /* Error sum flag */ // union byte_def U1SR_addr; #define U1SR U1SR_addr.byte #define U1SR_0 U1SR_addr.bit.b0 #define U1SR_1 U1SR_addr.bit.b1 #define CLK10PSEL U1SR_addr.bit.b2 #define CLK11PSEL U1SR_addr.bit.b3 #define U1SR_4 U1SR_addr.bit.b4 #define U1SR_5 U1SR_addr.bit.b5 #define U1SR_6 U1SR_addr.bit.b6 #define U1SR_7 U1SR_addr.bit.b7 // union byte_def PMR_addr; #define PMR PMR_addr.byte #define INT1SEL PMR_addr.bit.b0 #define INT2SEL PMR_addr.bit.b1 #define PMR_2 PMR_addr.bit.b2 #define PMR_3 PMR_addr.bit.b3 #define U1PINSEL PMR_addr.bit.b4 #define PMR_5 PMR_addr.bit.b5 #define PMR_6 PMR_addr.bit.b6 #define IICSEL PMR_addr.bit.b7 //************************************************* // Define ADC //************************************************* #define AD0 AD0_addr.word #define AD0L AD0_addr.byte.low #define AD0H AD0_addr.byte.high // union byte_def ADCON2_addr; #define ADCON2 ADCON2_addr.byte #define SMP ADCON2_addr.bit.b0 #define ADCON2_1 ADCON2_addr.bit.b1 #define ADCON2_2 ADCON2_addr.bit.b2 #define ADGSEL0 ADCON2_addr.bit.b3 #define ADGSEL1 ADCON2_addr.bit.b4 #define ADCON2_5 ADCON2_addr.bit.b5 #define ADCON2_6 ADCON2_addr.bit.b6 #define ADCON2_7 ADCON2_addr.bit.b7 // union byte_def ADCON0_addr; #define ADCON0 ADCON0_addr.byte #define CH0 ADCON0_addr.bit.b0 #define CH1 ADCON0_addr.bit.b1 #define CH2 ADCON0_addr.bit.b2 #define MD0 ADCON0_addr.bit.b3 #define MD1 ADCON0_addr.bit.b4 #define ADCAP ADCON0_addr.bit.b5 #define ADST ADCON0_addr.bit.b6 #define CKS0 ADCON0_addr.bit.b7 // union byte_def ADCON1_addr; #define ADCON1 ADCON1_addr.byte #define ADCON1_0 ADCON1_addr.bit.b0 #define ADCON1_1 ADCON1_addr.bit.b1 #define ADCON1_2 ADCON1_addr.bit.b2 #define BITS ADCON1_addr.bit.b3 #define CKS1 ADCON1_addr.bit.b4 #define VCUT ADCON1_addr.bit.b5 #define ADCON1_6 ADCON1_addr.bit.b6 #define ADCON1_7 ADCON1_addr.bit.b7 // //************************************************* // Define Function //************************************************* void Init_OSC(void); void Init_UART(void); void Send_UART(char); void Rec_UART(char *); void Send_UART_s(char *); void Init_ADC(void); void Get_ADC(unsigned int *); void Init_ADC(void); void Get_ADC(unsigned int *); void wat(void); void main(void) { unsigned int ad_data; unsigned int cnv_data; float ad_data_f; float cnv_data_f; unsigned char msg_line[20]; // ******************************* // 1.Initialized segment // ******************************* // (1)Select Osc (Select 20MHz External OSC) Init_OSC(); // (2)Initialize UART1 Init_UART(); // (3)Initialize A/D Converter Init_ADC(); // ******************************* // 2.Program main // ******************************* // (1)Init Message Send_UART_s("R8C/2B Connected OK> "); // (2)Program while(1){ Get_ADC(&ad_data); ad_data_f = ad_data ; cnv_data_f = ad_data_f / (float)1023 * (float)5000; cnv_data = (unsigned int)cnv_data_f; sprintf(msg_line," %d[mV]",cnv_data); Send_UART_s(msg_line); wat(); } } //****************************************************************************************** // Function Name : Init_OSC // Title : Select Osc (Select 20MHz External OSC) // Input : // Output : // Description : //****************************************************************************************** void Init_OSC(void){ unsigned int lp; PRC0 = 1; //Write enable CM0、CM1、OCD、FRA0、FRA1、FRA2 CM13 = 1; //Start External OSC CM05 = 0; //Start External OSC for(lp=0;lp<100;lp++){ asm("NOP"); } OCD2 = 0; //Select External OSC PRC0 = 0; //Write disable CM0、CM1、OCD、FRA0、FRA1、FRA2 } //****************************************************************************************** // Function Name : Send_UART_s // Title : // Input : // Output : // Description : Write TXREG //****************************************************************************************** void Send_UART_s(char *put_string) { while(*put_string!=0x00){ Send_UART(*put_string); put_string++; } } //****************************************************************************************** // Function Name : Init_UART // Title : // Input : // Output : // Description : //****************************************************************************************** void Init_UART(void) { // ************************************ // UART PIN選択 // ************************************ U1PINSEL = 1; PD6_7 = 0; // ************************************ // UARTiビットレートレジスタ(U0BRG/U1BRG)の設定 // ************************************ // U1BRG = 0x40; //ビットレート(19200bps) U1BRG = 0x80; //ビットレート(9600bps) // ************************************ // UARTi送受信モードレジスタ(U0MR/U1MR)の設定 // ************************************ // UARTモード転送データ長8ビット指定 SMD0_U1MR = 1; SMD1_U1MR = 0; SMD2_U1MR = 1; // 外部クロック指定(CLK0端子からの入力する場合は1にする) CKDIR_U1MR = 0; // 1ストップビット指定 STPS_U1MR = 0; // パリティ禁止指定 PRYE_U1MR = 0; // ************************************ // UARTi送受信制御レジスタ0(U0C0/U1C0)の設定 // ************************************ // f1を選択 CLK0_U1C0 = 0; CLK1_U1C0 = 0; // TXDi端子はCMOS出力 NCH_U1C0 = 0; // 転送クロックの立ち下がりで送信データ出力、立ち上がりで受信データ入力 CKPOL_U1C0 = 0; // LSBファースト UFORM_U1C0 = 0; // ************************************ // UARTi送受信制御レジスタ1(U0C1/U1C1)の設定 // ************************************ // 送信許可 TE_U1C1 = 1; // 受信許可 RE_U1C1 = 1; } //****************************************************************************************** // Function Name : Send_UART // Title : // Input : // Output : // Description : //****************************************************************************************** void Send_UART(char c_data) { while(TI_U1C1 != 1); // 送信バッファ空フラグ(0:UiTBにデータあり) U1TB = c_data; } //****************************************************************************************** // Function Name : Rec_UART // Title : // Input : // Output : // Description : //****************************************************************************************** void Rec_UART(char *c_data) { char error_f; char err; while (RI_U1C1 != 1) ; //受信完了フラグ(1:UiRBにデータあり) *c_data = U1RBL; // UARTi受信バッファレジスタ error_f = U1RBH & 0xf0; // エラーデータ } //****************************************************************************************** // Function Name : Init_ADC // Title : // Input : // Output : // Description : //****************************************************************************************** void Init_ADC(void) { // ************************************ // 0.ポート設定 // ************************************ PD0_0 = 0; // ************************************ // 1.A/D制御レジスタ0(ADCON0)の設定 // ************************************ // (1)A/D動作モード選択(0:単発モード 1:繰り返しモード ) // 単発モード(選択した1本の端子の入力電圧を1回A/D変換する) // 繰り返しモード(選択した1本の端子の入力電圧を繰り返しA/D変換する) // ※A/D動作モードを変更した場合は、あらためてアナログ入力端子を選択する事 MD0 = 0; MD1 = 0; // (2)A/D Converterの選択(AN8を選択) // CH2 CH1 CH0 ADGSEL0=0 ADGSEL0=1 // 0 0 0 : AN0 設定しない事 // 0 0 1 : AN1 設定しない事 // 0 1 0 : AN2 設定しない事 // 0 1 1 : AN3 設定しない事 // 1 0 0 : AN4 AN8 // 1 0 1 : AN5 AN9 // 1 1 0 : AN6 AN10 // 1 1 1 : AN7 AN11 CH2 = 1; // AN7(P0_0)を設定 CH1 = 1; // AN7(P0_0)を設定 CH0 = 1; // AN7(P0_0)を設定 // (3)A/D変換開始フラグ(0:A/D変換停止 1:A/D変換開始) ADST = 0; // (4)0:ソフトウェアトリガ(ADSTビット)で開始 ADCAP = 0; // (5)周波数選択ビット0 // [ADCON1レジスタのCKS1=0の場合] // 0:f4を選択 // 1:f2を選択 // [ADCON1レジスタのCKS1=1の場合] // 0:f1を選択 // 1:fOCO-Fを選択 CKS0 = 0; // ************************************ // A/D制御レジスタ1(ADCON1)の設定 // ************************************ // (1)8/10ビットモード選択(0:8ビットモード 1:10ビットモード) BITS = 1; // (2)周波数選択ビット1 // ※ADCON0のCKS0を見よ CKS1 = 0; // (3)VREF接続ビット(0:VREF未接続 1:VREF接続) // ※VCUTビットを“0”(未接続)から“1”(接続)にしたときは、1μs以上経過した後にA/D変換を開始する事 VCUT = 1; // ************************************ // A/D制御レジスタ2(ADCON2)の設定 // ************************************ // (0)デフォルト値を設定 ADCON2 = 0; // (1)A/D変換方式選択ビット(0:サンプル&ホールドなし 1:サンプル&ホールドあり) // サンプル&ホールドありにすると、1 端子あたりの変換速度が向上する。 // サンプル&ホールドの有無を選択してからA/D変換を開始する SMP = 0; // (2)A/D入力グループ選択ビット(0:ポートP0グループ(AN0〜AN7),1:ポートP1グループ(AN8〜AN11)) ADGSEL0 = 0; ADGSEL1 = 0; } //****************************************************************************************** // Function Name : Get_ADC // Title : // Input : // Output : // Description : //****************************************************************************************** void Get_ADC(unsigned int *ad_data) { // (1)Start A/D Conveter ADST = 1; // (2)Cehck A/D Conveter while(ADST!=0); // (3)Copy A/D data *ad_data = AD0 ; // (4)End A/D Conveter ADST = 0; } //****************************************************************************************** // Function Name : wat // Title : wait function // Input : // Output : // Description : //****************************************************************************************** void wat(void) { unsigned int i,i1; for( i1=0 ; i1<100 ; i1++ ){ for( i=0 ; i<500 ; i++ ){ asm("NOP"); } } }