//****************************************************************************************** // Project : STM8S105C6T6 Sample Program (STM8S-Discovery) // Program Name : // Programer : // Create date : Version 1.0 H24.10.09 // History : // Laungage : STM8Cosmic C Launguage //****************************************************************************************** // Description // CCO : PE0 // //****************************************************************************************** #include "iostm8s.h" //#include "iostm8s105.h" void Init_CCO(unsigned char); #define PI_CCO_fHSIDIV 0b00000000 #define PI_CCO_fLSI 0b00000010 #define PI_CCO_fHSE 0b00000100 #define PI_CCO_fCPU 0b00001000 #define PI_CCO_fCPU2 0b00001010 #define PI_CCO_fCPU4 0b00001100 #define PI_CCO_fCPU8 0b00001110 #define PI_CCO_fCPU16 0b00010000 #define PI_CCO_fCPU32 0b00010010 #define PI_CCO_fCPU64 0b00010100 #define PI_CCO_fHSI 0b00010110 #define PI_CCO_fMASTER 0b00011000 int main(void) { // ******************** // 1.Initialized // ******************** // (1)Define GPIO (CCO:PE0) // For Alternate Function input, you should select floating or pull-up input configuration in the DDR and CR1 registers. // Alternate function outputs provide a direct path from a peripheral to an output or to an I/O pad, // taking precedence over the port bit in the data output latch register (Px_ODR) and forcing the Px_DDR corresponding bit to 1. // An alternate function output can be push-pull or pseudo-open drain depending on the peripheral and // Control register 1 (Px_CR1) and slope can be controlled depending on the Control register 2 (Px_CR2) values. PE_DDR = 0b00000001; PE_CR1 = 0b00000001; // PE_CR2 = 0b00000001; // (2)Initialized CCO Init_CCO(PI_CCO_fCPU); // ******************** // 2.Main // ******************** while(1); } //****************************************************************************************** // Function Name : Init_CCO // Title : Initialized CCO // Input : // Output : // Description : //****************************************************************************************** void Init_CCO(unsigned char cco_sel) { // *************************************** // CLK_CCOR(Configurable clock output register) // *************************************** // CLK_CCOR[7] Reserved, must be kept cleared. // CLK_CCOR[6] CCOBSY: Configurable clock output busy // This bit is set and cleared by hardware. // It indicates that the selected CCO clock source is being switched-on and stabilized. // While CCOBSY is set, the CCOSEL bits are write-protected. // CCOBSY remains set until the CCO clock is enabled. // 0: CCO clock not busy // 1: CCO clock busy // CLK_CCOR[5] CCORDY: Configurable clock output ready // This bit is set and cleared by hardware. It indicates that the CCO clock is being output. // 0: CCO clock not available // 1: CCO clock available // CLK_CCOR[4:1] CCOSEL[3:0]: Configurable clock output selection. // These bits are written by software to select the source of the output clock available on the CLK_CCO pin. // They are write-protected when CCOBSY is set. // 0000: fHSIDIV, 0001: fLSI, 0010: fHSE, 0011: Reserved, 0100: fCPU, 0101: fCPU/2, // 0110: fCPU/4, 0111: fCPU/8, 1000: fCPU/16, 1001: fCPU/32, 1010: fCPU/64, 1011: fHSI, // 1100: fMASTER, 1101: fCPU, 1110: fCPU, 1111: fCPU // CLK_CCOR[0] CCOEN: Configurable clock output enable // This bit is set and cleared by software. // 0: CCO clock output disabled // 1: CCO clock output enabled CLK_CCOR = cco_sel; CLK_CCOR |= 0b00000001; }