//****************************************************************************************** // Project : STM8S105C6T6 Sample Program (STM8S-Discovery) // Program Name : // Programer : // Create date : Version 1.0 H24.10.04 // History : // Laungage : STM8Cosmic C Launguage //****************************************************************************************** // Description // USART2 Tx2:PD5, Rx2:PD6 // A/D Conveter AIN0(PB0) //****************************************************************************************** #include #include #include #include //#include "iostm8s.h" #include "iostm8s105.h" void InitUART(void); void SendUART(unsigned char); void RecUART(unsigned char *); void SendUARTStr(unsigned char *); void InitADC(void); void GetADC(unsigned int *); void Editdata(unsigned char *,unsigned int); void wait(void); #define PI_DATALINE_MAX 100 int main(void) { unsigned int adc_data; unsigned char TMP_dataline[PI_DATALINE_MAX]; // ******************** // 1.Initialized // ******************** // (1)Define CLK_PCKENR1,2 (Peripheral clock gating register) // After a device reset, all peripheral clocks are enabled. Reset value: 0xFF // CLK_PCKENR1 CLK_PCKENR1[3-2]: UART1/2/3 0:Fmaster to peripheral disabled, 1:Fmaster to peripheral enabled // CLK_PCKENR2 CLK_PCKENR2[3]: ADC 0:Fmaster to peripheral disabled, 1:Fmaster to peripheral enabled // (2)Define GPIOD (Rx:PD6 ,Tx:PD5) // For Alternate Function input, you should select floating or pull-up input configuration in the DDR and CR1 registers. // Alternate function outputs provide a direct path from a peripheral to an output or to an I/O pad, // taking precedence over the port bit in the data output latch register (Px_ODR) and forcing the Px_DDR corresponding bit to 1. // An alternate function output can be push-pull or pseudo-open drain depending on the peripheral and // Control register 1 (Px_CR1) and slope can be controlled depending on the Control register 2 (Px_CR2) values. PD_DDR = 0b00100000; PD_CR1 = 0b00100000; // PD_CR2 = 0b00100000; // (3)Define GPIOB (AIN0:PB0) PB_DDR = 0b00000000; PB_CR1 = 0b00000000; PB_CR2 = 0b00000000; // (4)Initialized UART InitUART(); // (5)Initialized A/D Converter InitADC(); // (6)Put Message SendUARTStr(" STM8S-Discovery Connected OK> "); // ******************* // 2.Program Main // ******************* while(1){ // (1)Get A/D conveter data GetADC(&adc_data); // (2)Edit data format Editdata(TMP_dataline, adc_data); // (3)Display A/D conveter data SendUARTStr(TMP_dataline); // (4)Wait wait(); } } //****************************************************************************************** // Function Name : InitUART // Title : Initialized UART // Input : // Output : // Description : 9600BPS //****************************************************************************************** void InitUART(void) { // ********************************** // UART_BRR(Baud rate register) : UART_DIV = fMASTER / baud // Example: fMASTER(10MHz), baud(9600BPS) // UART_DIV : 10,000,000 / 9600 => 0d1042 => 0x0412 => [0][41][2] => UART_BRR1[41], UART_BRR2[0][2] // ********************************** // UART_BRR1 // UART_BRR1[7:0] UART_DIV[11:4] These 8 bits define the 2nd and 3rd nibbles of the 16-bit UART divider (UART_DIV). // UART_BRR2 // UART_BRR1[7:4] UART_DIV[15:12] MSB of UART_DIV. These 4 bits define the MSB of the UART Divider (UART_DIV) // UART_BRR1[3:0] UART_DIV[3:0]: LSB of UART_DIV. These 4 bits define the LSB of the UART Divider (UART_DIV) // // fMASTER:16MHz/8, baud:9600BPS // 16,000,000 / 8 / 9600 ==> 0d208 ==> 0x00D0 ==> [0][0D][0] ==> UART_BRR1[0D], UART_BRR2[0][0] UART2_BRR2 = 0x00; UART2_BRR1 = 0x0d; // ********************************** // UART_CR1(Control register 1) // ********************************** // UART_CR1[7] R8: Receive Data bit 8. // This bit is used to store the 9th bit of the received word when M=1 // UART_CR1[6] T8: Transmit data bit 8. // This bit is used to store the 9th bit of the transmitted word when M=1 // UART_CR1[5] UARTD: UART Disable (for low power consumption). // When this bit is set the UART prescaler and outputs are stopped at the end of the current byte // transfer in order to reduce power consumption. This bit is set and cleared by software. // 0: UART enabled // 1: UART prescaler and outputs disabled // UART_CR1[4] M: word length. // This bit determines the word length. It is set or cleared by software. // 0: 1 Start bit, 8 Data bits, n Stop bit (n depending on STOP[1:0] bits in the UART_CR3 register) // 1: 1 Start bit, 9 Data bits, 1 Stop bit // UART_CR1[3] WAKE: Wakeup method. // This bit determines the UART wakeup method, it is set or cleared by software. // 0: Idle Line // 1: Address Mark // UART_CR1[2] PCEN: Parity control enable. // UART Mode // 0: Parity control disabled // 1: Parity control enabled // UART_CR1[1] PS: Parity selection. // This bit selects the odd or even parity when the parity generation/detection is enabled (PCEN bit set) // in UART mode. It is set and cleared by software. The parity will be selected after the current byte. // 0: Even parity // 1: Odd parity // UART_CR1[0] PIEN: Parity interrupt enable. // This bit is set and cleared by software. // 0: Parity interrupt disabled // 1: Parity interrupt is generated whenever PE=1 in the UART_SR register // UART2_CR1 = 0b00000000; // ********************************** // UART_CR2(Control register 2) // ********************************** // UART_CR2[7] TIEN: Transmitter interrupt enable // This bit is set and cleared by software. // 0: Interrupt is inhibited // 1: An UART interrupt is generated whenever TXE=1 in the UART_SR register // UART_CR2[6] TCIEN: Transmission complete interrupt enable // This bit is set and cleared by software. // 0: Interrupt is inhibited // 1: An UART interrupt is generated whenever TC=1 in the UART_SR register // UART_CR2[5] RIEN: Receiver interrupt enable // This bit is set and cleared by software. // 0: Interrupt is inhibited // 1: An UART interrupt is generated whenever OR=1 or RXNE=1 in the UART_SR register // UART_CR2[4] ILIEN: IDLE Line interrupt enable // This bit is set and cleared by software. // 0: Interrupt is inhibited // 1: An UART interrupt is generated whenever IDLE=1 in the UART_SR register // UART_CR2[3] TEN: Transmitter enable // This bit enables the transmitter. It is set and cleared by software. // 0: Transmitter is disabled // 1: Transmitter is enabled // UART_CR2[2] REN: Receiver enable // This bit enables the receiver. It is set and cleared by software. // 0: Receiver is disabled // 1: Receiver is enabled and begins searching for a start bit // UART_CR2[1] RWU: Receiver wakeup // UART Mode // This bit determines if the UART is in mute mode or not. It is set and cleared by software and can be // cleared by hardware when a wakeup sequence is recognized // UART_CR2[0] SBK: Send break // This bit set is used to send break characters. It can be set and cleared by software.It should be set // by software, and will be reset by hardware during the stop bit of break. // 0: No break character is transmitted // 1: Break character will be transmitted UART2_CR2 = 0b00001100; // ********************************** // UART_CR3(Control register 3) // ********************************** // UART2_CR3 = 0b00000000; } //****************************************************************************************** // Function Name : SendUARTStr // Title : Send UART Strings // Input : // Output : // Description : //****************************************************************************************** void SendUARTStr(unsigned char in_s[]) { unsigned char lp = 0; while(in_s[lp] != 0){ SendUART(in_s[lp]); lp++; } } //****************************************************************************************** // Function Name : SendUART // Title : Send UART // Input : // Output : // Description : //****************************************************************************************** void SendUART(unsigned char in_c) { while (!(UART2_SR & 0b10000000)); // USART_SR[7]:TXE Transmit data register empty // 0: Data is not transferred to the shift register, 1: Data is transferred to the shift register UART2_DR = in_c; } //****************************************************************************************** // Function Name : RecUART // Title : Recive UART // Input : // Output : // Description : //****************************************************************************************** void RecUART(unsigned char *out_c) { while (!(UART2_SR & 0b00100000)); // USART_SR[5]:RXNE Read data register not empty // 0: Data is not received, 1: Received data is ready to be read. *out_c = UART2_DR; } //****************************************************************************************** // Function Name : InitADC // Title : Initialize A/D Converter // Input : // Output : // Description : A/D Converter : AIN0(B0) //****************************************************************************************** void InitADC(void) { // *************************************** // Define ADC_TDR( ADC Schmitt trigger disable register high/low ) // *************************************** // TDRH[7:0] TD[15:8] Schmitt trigger disable high // TDRL[7:0] TD[7:0] Schmitt trigger disable low // When a TDx bit is set, it disables the I/O port input Schmitt trigger of the corresponding // ADC input channel x even if this channel is not being converted. // This is needed to lower the static power consumption of the I/O port. // 0: Schmitt trigger enabled // 1: Schmitt trigger disabled ADC_TDRL = 0b00000001; // AIN0 => analog input // *************************************** // Define ADC_CSR( ADC control/status register ) // *************************************** // ADC_CSR[7] EOC: End of conversion // This bit is set by hardware at the end of conversion. // It is cleared by software by writing e0f. // 0: Conversion is not complete, 1: Conversion complete // ADC_CSR[6] AWD: Analog Watchdog flag 0: No analog watchdog event, 1: An analog watchdog event occurred. // ADC_CSR[5] EOCIE: Interrupt enable for EOC It enables the interrupt for End of Conversion. // 0: EOC interrupt disabled, 1: EOC interrupt enabled. An interrupt is generated when the EOC bit is set. // ADC_CSR[4] AWDIE: Analog watchdog interrupt enable // 0: AWD interrupt disabled. 1: AWD interrupt enabled // ADC_CSR[3:0] CH[3:0]: Channel selection bits // They select the input channel to be converted. // 0000: Channel AIN0 // 0001: Channel AIN1 // **** // 1111: Channel AIN15 ADC_CSR = 0b00000000 ; // Channel selection AIN1 // *************************************** // Define ADC_CR1( ADC configuration register 1 ) // *************************************** // ADC_CR1[7] Reserved // ADC_CR1[6:4] SPSEL[2:0]: Prescaler selection // These control bits are written by software to select the prescaler division factor. // 000: fADC = fMASTER/2 // 001: fADC = fMASTER/3 // 010: fADC = fMASTER/4 // 011: fADC = fMASTER/6 // 100: fADC = fMASTER/8 // 101: fADC = fMASTER/10 // 110: fADC = fMASTER/12 // 111: fADC = fMASTER/18 // ADC_CR1[3:2] Reserved // ADC_CR1[1] CONT: Continuous conversion // If set, conversion takes place continuously till this bit is reset by software. // 0: Single conversion mode, 1: Continuous conversion mode // ADC_CR1[0] ADON: A/D Converter on/off // This bit must be written to wake up the ADC from power down mode and to trigger the start of conversion. // If this bit holds a value of 0 and a 1 is written to it then it wakes the ADC from power down mode. // Conversion starts when this bit holds a value of 1 and a 1 is written to it. // As soon as the ADC is powered on, the output stage of the selected channel is disabled. // 0: Disable ADC conversion/calibration and go to power down mode. // 1: Enable ADC and to start conversion ADC_CR1 = 0b01000000; // *************************************** // Define ADC_CR2( ADC configuration register 2 ) // *************************************** // ADC_CR2[7] Reserved // ADC_CR2[6] EXTTRIG: External trigger enable // ADC_CR2[5:4] EXTSEL[1:0]: External event selection // ADC_CR2[3] ALIGN: Data alignment // 0: Left alignment (the eight MSB bits are written in the ADC_DRH register then the remaining LSB bits are written in the ADC_DRL register). // The reading order should be MSB first and then LSB. // 1: Right alignment (eight LSB bits are written in the ADC_DRL register then the remaining MSB bits are written in the ADC_DH register). // The reading order should be LSB first and then MSB. // ADC_CR2[2] Reserved // ADC_CR2[1] SCAN: Scan mode enable // 0: Scan mode disabled, 1: Scan mode enabled // ADC_CR2[0] Reserved ADC_CR2 = 0b00001000; // *************************************** // Define ADC_CR3( ADC configuration register 3 ) // *************************************** // ADC_CR3[7] DBUF: Data buffer enable // It is used together with the CONT bit enable buffered continuous mode (DBUF=1, CONT=1). // When DBUF is set, converted values are stored in the ADC_DBxRH and ADC_DBxRL registers instead of the ADC_DRH and // ADC_DRL registers. // 0: Data buffer disabled, 1: Data buffer enabled // ADC_CR3[6] OVR: Overrun flag // 0: No overrun, 1: An overrun was detected in the data buffer registers. // ADC_CR2[5:0] Reserved ADC_CR3 = 0b00000000; ADC_CR1 |= 0x00000001; //Enable ADC and to start conversion } //****************************************************************************************** // Function Name : GetADC // Title : Get A/D Converter data // Input : // Output : // Description : //****************************************************************************************** void GetADC(unsigned int *adc_data) { unsigned char tmph,tmpl; ADC_CR1 |= 0x00000001; //Enable ADC and to start conversion ADC_CSR &= 0x01111111; //EOC(ADC_CSR[7]) Clear while ((ADC_CSR & 0b10000000) == 0); //ADC_CSR(ADC control status register)[7]:EOC End of conversion // This bit is set by hardware at the end of conversion. // It is cleared by software by writing e0f. // 0: Conversion is not complete, 1: Conversion complete tmpl = ADC_DRL ; tmph = ADC_DRH ; *adc_data = (unsigned int)(tmph * 256) + (unsigned int)tmpl ; } //****************************************************************************************** // Function Name : Editdata // Title : Edit data format // Input : // Output : //****************************************************************************************** void Editdata(unsigned char put_str[],unsigned int adc_data) { unsigned int volt_data; double tmp_data; strcpy(&put_str[0]," "); tmp_data = adc_data ; tmp_data = tmp_data * 3300 / 1023 ; volt_data = tmp_data ; sprintf(&put_str[2],"%d",volt_data); strcat(&put_str[0],"[mV] "); } //****************************************************************************************** // Function Name : wait // Title : wait function // Input : // Output : // Description : //****************************************************************************************** void wait(void) { unsigned int lp,lp1; for(lp=0;lp<100;lp++) for(lp1=0;lp1<1000;lp1++){}; }