/* MAIN.C file
 * 
 * Copyright (c) 2002-2005 STMicroelectronics
 */

//******************************************************************************************
//   Project      :  STM8S105K4T3C Sample Program
//   Program Name :
//   Programer    :
//   Create date  :  Version 1.0    R02.10.20
//   History      :
//   Laungage     :  STM8Cosmic C Launguage 
//******************************************************************************************
//   Description
//      OSC: Internal OSC 16MHz / External Clock 16MHz Crystal
//******************************************************************************************
#include "iostm8s.h"

void Init_clock_int(void);
void Init_clock_ext(void);
void wat(void);

int main(void) {

    unsigned char LEDlst=0;
    unsigned int lp;

// ********************
//  1.Initialized
// ********************
//  (1)Define Clock
    Init_clock_int();     //Internal OSC 16MHz
//  Init_clock_ext();     //External OSC (16MHz Crystal)

//  (2)Define I/O PORT 
    PD_DDR = 0b11111111;  //Direction
    PD_CR1 = 0b11111111;  //0:Open drain, 1:Push-pull 
    PD_CR2 = 0b11111111;  //0:Output speed up to 2 MHz, 1: Output speed up to 10 MHz

// ********************
//  2.Main
// ********************
    LEDlst = 1;
    while(1){
        if(LEDlst == 1){
            LEDlst = 2;
        }else if(LEDlst > 127){
            LEDlst = 1;
        }else{
            LEDlst = LEDlst * 2;
        }
        PD_ODR = LEDlst;
        wat();
    }
}

//******************************************************************************************
//   Function Name : Init_clock_int
//   Title         : Initialized System clock
//   Input         :
//   Output        :
//   Description   : Internal OSC 16MHz ( Default Clock : Internal OSC 2MHz)
//******************************************************************************************
void Init_clock_int(void)
{
// *******************************
// Define CLK_CKDIVR (Clock divider register)   Reset value: 0x18(0b00011000)
// *******************************
//    CLK_CKDIVR[7:5] Reserved, must be kept cleared.
//    CLK_CKDIVR[4:3] HSIDIV[1:0]: High speed internal clock prescaler
//         These bits are written by software to define the HSI prescaling factor.
//            00: fHSI= fHSI RC output
//            01: fHSI= fHSI RC output/2
//            10: fHSI= fHSI RC output/4
//            11: fHSI= fHSI RC output/8
//    CLK_CKDIVR[2:0] CPUDIV[2:0]: CPU clock prescaler
//         These bits are written by software to define the CPU clock prescaling factor.
//           000: fCPU=fMASTER
//           001: fCPU=fMASTER/2
//           010: fCPU=fMASTER/4
//           011: fCPU=fMASTER/8
//           100: fCPU=fMASTER/16
//           101: fCPU=fMASTER/32
//           110: fCPU=fMASTER/64
//           111: fCPU=fMASTER/128
    CLK_CKDIVR = 0b00000000;
}


//******************************************************************************************
//   Function Name : Init_clock_ext
//   Title         : Initialized System clock
//   Input         :
//   Output        :
//   Description   : External Crystal OSC (16MHz)
//******************************************************************************************
void Init_clock_ext(void)
{
// *******************************
// Define CLK_ECKCR (External clock register)  Reset value: 0x00
// *******************************
//     CLK_ECKR[7:2] Reserved, must be kept cleared.
//     CLK_ECKR[1] HSERDY: High speed external crystal oscillator ready
//         This bit is set and cleared by hardware.
//             0: HSE clock not ready
//             1: HSE clock ready (HSE clock is stabilized and available)
//     CLK_ECKR[0] HSEEN: High speed external crystal oscillator enable
//         This bit is set and cleared by software. 
//         It can be used to switch the external crystal oscillator on or off. 
//             0: HSE clock off
//             1: HSE clock on
    CLK_ECKCR = 0b00000001 ;
    while ((CLK_ECKCR & 0b00000010) == 0);      


// *******************************
// Define CLK_SWCR (Switch control register)
// *******************************
//    CLK_SWCR[7:4] Reserved.
//    CLK_SWCR[3] SWIF: Clock switch interrupt flag
//    CLK_SWCR[2] SWIEN: Clock switch interrupt enable
//    CLK_SWCR[1] SWEN: Switch start/stop
//          Writing a 1 to this bit enables switching the master clock to the source defined in the CLK_SWR register.
//              0: Disable clock switch execution
//              1: Enable clock switch execution
//    CLK_SWCR[0] SWBSY: Switch busy
//          This bit is set and cleared by hardware. It can be cleared by software to reset the clock switch process.
//              0: No clock switch ongoing
//              1: Clock switch ongoing
    CLK_SWCR = 0b00000010;

// *******************************
// Define CLK_SWR (Clock master switch register)   Reset value: 0xE1
// *******************************
//     CLK_SWR[7:0] SWI[7:0]: Clock master selection bits
//          These bits are written by software to select the master clock source. 
//          Its contents are write protected while a clock switch is ongoing (while the SWBSY bit is set). 
//          They are set to the reset value (HSI) if the AUX bit is set in the CLK_CSSR register. 
//          If Fast Halt wakeup mode is selected (FHW bit =1 in CLK_ICKR register) then these bits are set by hardware 
//          to E1h (HSI selected) when resuming from Halt/Active-halt mode.
//              0xE1: HSI selected as master clock source (reset value)
//              0xD2: LSI selected as master clock source (only if LSI_EN option bit is set)
//              0xB4: HSE selected as master clock source
    CLK_SWR = 0xB4 ;
}

//******************************************************************************************
//   Function Name : wat
//   Title         : wait function
//   Input         :
//   Output        :
//   Description   : 
//******************************************************************************************
void wat(void)
{
unsigned int lp,lp1;
    for(lp=0;lp<100;lp++)
        for(lp1=0;lp1<1000;lp1++){};
}